some strange reason i have a post to make-re NV30

[BoardBonobo]

And what is the likelihood that they may have employed some Gigapixel style tile based rendering. I understand that this is notoriously difficult to get working properly, but how long have they had the technology now? Is it possible they may have found a solution along those lines?

 

[Geeforcer]

There's always a hierarchical Zbuffer and Ned Greene's methods, that has yet to be implemented in Nvidia's offering.

If they can put a full pyramid (only 3 layers for ATI), the bandwidth savings would be quite high (SA had a chart showing the potential gains from a few years ago).

The average case could gain some 20% in bandwidth/overdraw intensive scenes.

Likewise, if they have implemented a very smart FSAA algorithm (say something like Z3) as well as a more adaptive AF algorithm, one could see raw bandwidth leads disentigrating. Efficiency can be just as important as raw bandwidth. Look at Parhelia for an example.

Yes, but since most people here do NOT know A. How much raw bandwidth will R300 or NV30 have; B. What techniques NV30 will use to decrease consumption; and C. How effective bandwidth management on either card really is, much of the speculation here is pointless. Some of the people in this thread (not Fred, others) are already making assumptions about the relative performance of the two parts, despite an utter lack of factual foundation.

 

[Randell]

/me fluffles Ben

This current ATI owner still loves yer

 

[Ailuros]

More granularity. The data would be splint into smaller chunks with 128bit bus (32bits as opposed to 64bits with 256bit bus).

Interesting. So how likely would be let's say an 8 x 16bits scenario then?

 

[LeStoffer]

Something caught my eye:

10. John Carmack quote in it's entirety: Nvidia is the first of the consumer graphics companies to firmly understand what is going to be happening with the convergence of consumer realtime and professional offline rendering. The architectural decision in the NV30 to allow full floating point precision all the way to the framebuffer and texture fetch, instead of just in internal paths, is a good example of far sighted planning. It has been obvious to me for some time how things are going to come together, but Nvidia has made moves on both the technical and company strategic fronts that are going to accelerate my timetable over my original estimations

Huh? Does this imply that R300 doesn't support full floating point precision in the framebuffer and during texture fetch? I'm a work now and thus cannot tjeck the ATI papers...

 

[Dave Baumann]

Huh? Does this imply that R300 doesn't support full floating point precision in the framebuffer and during texture fetch? I'm a work now and thus cannot tjeck the ATI papers...

Texture fetches may be different, that depends on what texture formats it supports, is the front buffer formats that more of a concern for multipass operations. However I've yet to actually see anywhere in the ATi documents where they do state what colour depths they do actually support in the framebuffer.

 

[Evildeus]

Concerning the NDA, it seems that it will be lifted before the end of this summer and that Ben was not far from the truth on the DDR2 (confirm by the webmaster of www.hardware.fr. It'shere, the posts by Marc)

*edit*
The day when the NDA will be lifted is know for more than 2 month ( end of april/beginning of may).

 

[Qroach]

Joe,

First of all, I don't see anyone screaming murder one way or another. Any company who delivers a part with more "advanced" pipelines is cool.

Well that's good that YOU praise them for it, but that's not what a few others have been doing around here. You'd know what I'm talking about if you're reading these thread over the past few days. They aren't even what I'd call "healthy debates", it explains why so many regulars are getting frustrated with all the nonesense going on around here lately...

 

[Reverend]

Nothing on AA, ben? I'm willing to bet <insert something really of value> that it'll be Z3-based.

 

[DemoCoder]

The DDR2 stuff doesn't really make any sense as a solution to their bandwidth issues, since it is just an easier to manufacture and use form of DDR.

I assuming that with the new 64-bit/128-bit framebuffer formats, and the 64-bit/128-bit texture formats, combined with *unlimited number if texture fetches* that NVidia knows a massive amount of new bandwidth has to come from somewhere.

If it doesn't come from exotic memory or bus, it has to come from efficiency. Now Z3 would be nice, but that only solves the AA problem, it doesnt' solve the issue with a pixel shader fetching 10 128-bit texture samples (and with 64-128 tap AF, that would be a huge bandwidth hit!)

I'm assuming either a tiler, or a segmented bus, one for textures and one for framebuffer, both 128-bit.


BTW, 128-bit FP textures brings up an interesting point: Has NVidia or anyone else invented a replacement for S3TC? It seems to me that you'd need both a lossless algorithm and a lossy one. Some FP data you don't want messed up by the compressor. VQ would probably work nicely for the lossy one.

 

[Qroach]

Ben, don't pay any attention to these guys, as far as I can see DT's been more wrong on things then I've ever seen you be wrong about them. I don't even know why he'd other to go that route in this thread, there was no need for it. Anyway, thank's for posting the info you had, it was very interesting.

 

[tt_22]

12. DX9 shift from bandwidth to computation. Pixel Shading is not pixel filling

Also, it's starting to seem more and more evident to me that NV-30 is not going to be a world-beater in performance with today's games. At this point, here's my assumptions of NV30:

16 Texture / "Shader" units, compared to R-300's 8
128 bit, DDR2 memory, assume maybe 450Mhz: Approx 15 GB/sec.

What that would appear to be is a very "bandwidth limited" part...when in heavy "fill rate" situations.

That would, however, fit in very nicely with the quote on top of this page, and other nVidia comments about "pixel quality" and not performance. Reading into the "pixel shading is not pixel filling" quote above, it seems that heavy use of pixel shading ops is more computationally expensive, not bandwidth/fillrate. So the NV30 architecture may be more "balanced" for very heavy pixel shading scenarios, while being unbalanced for heavy "fill rate" scenarios.

What that would imply, is that performance in todays games and games for the forseeable future, I'd expect Nv30's performance to fall in line according to its memory bandwidth. So if it's 128 bit DDR-2, then I would expect NV30 to fall between Ti-4600 and R-300 performance in games.

On the other hand, in the "3D renderfarm" type market (loads and loads of pixel shading ops), the extra "computational power" of the NV30 would pull it ahead, performance wise, of the R-300. Bandwidth is less important.

All speculation of course....can change tomorrow if Ben6 decdes to post again.

I don't understand.. by the timeof games using this heavily pixel shaded games we will have other better boards, i guess Nvidia would like to sell this board too. If R9700 outperforms the NV30 in every game until the R350 and NV35 appears, why would anyone buy the NV30?

 

[pascal]

With memory there are two different things:
-Bandwith (MB/s)
-Access (Access/s)

Suppose both have a four way (or four crossbar) access.
With a 256bits 300MHz DDR we get 19.2 GB/s and up to 1.2G access/s.
With a 128bits 400Mhz DDR we get 12.8GB/s and up to 1.6G access/s.
With a 128bits 500MHz DDR we get a 16GB/s and up to 2G access/s

Of course a 256bits solution will be faster than a 128bits solution with the same architecture at the same speed. Maybe not twice as fast but certainlly faster.

Now if the 128bits has higher clock speed and the same architecture than we have to take not only the higher bandwith but also the higher number of access. It was the higher number of access that originally give LMA some good advantage.

I am not sure about DDR-II because of its 4 burst mode only.

 

[MuFu]

For what it's worth, all the R300 eng work was essentially completed a long time ago and I'm sure ATi knew that they might not be able to meet the final DX9 specs exactly, but were prepared to patch up any discrepancy with software. There shouldn't be any problems.

As for NV30 - best of luck to nVidia. They are a much more aggresive company than ATi and should be entitled to wangle things slightly to ensure NV30 is a success, IMO. R300 probably caught them slightly off-guard. I don't think they suspected it would actually be THAT good.

Re. DDR-II - It has a number of other advantages (not just performance for a given bus width) that make it ideal for use on video cards.

MuFu.

 

[Evildeus]

Re. DDR-II - It has a number of other advantages (not just performance for a given bus width) that make it ideal for use on video cards.

MuFu.

Can you elaborate a little Mufu? thx.

 

[demalion]

Re. DDR-II - It has a number of other advantages (not just performance for a given bus width) that make it ideal for use on video cards.

MuFu.

Can you elaborate a little Mufu? thx.

I thought the chief advantage of DDR-II was latency?

 

[Evildeus]

I thought the chief advantage of DDR-II was latency?

Well, when i look at DDR-II latency i find it not as good as present DDR, that's why i'm asking.

 

[MuFu]

Re. DDR-II - It has a number of other advantages (not just performance for a given bus width) that make it ideal for use on video cards.

MuFu.

Can you elaborate a little Mufu? thx.

Oh, it's nothing incredibly interesting. I was just thinking that on-die termination and lower power requirements are going to make PCB logistics simpler. Routing should be slightly easier and overall board power consumption will be lower; important when the ASICs are drawing 20-30W alone.

I wouldn't be suprised if they can manufacture NV30 for less than R300, on a 6-layer PCB with no external power requirement. Of course, ATi should already be reaping in the rewards of their 9700 masterstroke by then, so it'll be interesting to see what happens.

I'd also love to see them adopt a multiple chip-config a la 3DFX (perhaps separate vertex unit) and whack it all under an MCM-BGA-type hood. Who cares if it isn't practical?! It'd just be nice to see.

MuFu.

 

[KimB]

Sorry...I had been going on memory from a year or two ago, when it was rumored that DDR2 was to be the quad-signalling version of SDRAM.

Unless nVidia can still manage to get DDR2 in the effective range of 900-1000MHz, it appears that nVidia will need to do something amazing in terms of memory bandwidth savings (mostly as it relates to FSAA) in order to compete in performance.

But, I still must point out the confidence we've seen so far as to the performance of the NV30.

And if the NV30 doesn't outperform the R300 in nearly every situation, we have the right to be disappointed.

 

[JF_Aidan_Pryde]

And if the NV30 doesn't outperform the R300 in nearly every situation, we have the right to be disappointed.

No.. if the NV30 doesn't outperform the R300 in nearly every situation, YOU have the right to be disappointed. Many of us an't expecting any significant performance leaps.