https://wccftech.com/samsung-disclo...y-next-gen-chips-joining-the-race-with-intel/
The new BSPDN method hasn't been adopted by foundries yet, and Samsung is the first one to disclose the results of the innovation method. According to the Korean giant, they reduced the area by 14.8%, compared to the traditional method. Reduction in area results in the company having more room to add more "goodies" into a die, such as a transistor, leading to an overall increment in performance.