RXXX Series Roadmap from AnandTech

[chavvdarrr]

what is cheaper?
128-bit, 1400Mhz mem clock (expensive ram chips + "narrow-bus" PCB able to handle high clocks)
or
256-bit , 700MHz mem clock (cheap ram chips + "wide-bus" PCB)

 

[Dave Baumann]

Read my post here and factor that into your thinking.

 

[Jawed]

So does anyone here think that these GPUs will feature a superscalar (dual-issue capable) fragment shader pipeline?

I have my doubts - based on the RV530's clock rate and apparent number of pipelines, it's almost double the performance of X700XT without counting the fragment pipelines as superscalar.

If ATI can make it this fast while not being superscalar, then it doesn't seem to need to be any faster.

On the other hand, if the RV530 is supposed to take over from X800XL ($300) at the top of the mid-range, then it would need to be superscalar, otherwise the performance increment over X800XL is simply not there (not with a 128-bit bus!).

Also, if R520 is really 16 fragment shader pipelines, it would need to be superscalar because the likely clockspeeds (600-700MHz by the look of things) just aren't going to outperform R480 (X850XTPE) by much at all.

On the other hand, perhaps a TMU-pool shared by all fragment shader pipelines (as per my sig) combined with the new memory architecture is such a massive boost to performance (e.g. by halving the bottleneck effect of any texture operations) that this new architecture doesn't need a superscalar ALUs.

Sigh...

Jawed

 

[Arun]

Superscalar? Why would ATI bother going super-scalar? They've been Vec3+Scalar historically, and this has always worked nicely for them. You seem to be overestimating the usage of Vec2+Vec2.

Uttar

 

[Jawed]

Superscalar? Why would ATI bother going super-scalar? They've been Vec3+Scalar historically, and this has always worked nicely for them. You seem to be overestimating the usage of Vec2+Vec2.

Superscalar would mean (vec3+scalar) and (vec3+scalar).

Anyway as it happens right now I agree, ATI is prolly sticking with the R300 style of co-issue only fragment shader pipeline.

Jawed

 

[John Reynolds]

Would the next person who is in the same room as Dave punch him in the arm or chest for me? TIA!

 

[Unknown Soldier]

So with all the leaking that's starting to happen . .can we expect the R5xx variants to be announced by the end of the month?(as suggested by ATI CEO two months ago) Although availablility is to be expected end of September I take it.(R520XL)

 

[Geo]

I wanna know what R520XL is that is going first. Down-clocked R520XT, or a down-clocked *and* quad-disabled R520XT? If they are having serious yield and leakage issues, I would think both. If just leakage issues, then just down-clocked.

There have been two strands of clock rumors floating about on 16-pipe R520. One in the 600-650 range and one in the 700-750 range. This might explain it. . .

 

[Unknown Soldier]

RV530 is a beast

Fragment shader rate:

RV530 - 7200M fragments/s
X800XL - 6400M fragments/s
X850XT - 8320M fragments/s

RV515 is a beast too:

RV515 - 3200M fragment/s
X550 - 1600M fragments/s
X300 - 1300M fragments/s
X700XT - 3800M fragments/s

Blimey.

Jawed

If that is true and the RV530 does do 7200M and it does have only 12 pipes and is 4-1-3-2 then could the rest of the bandwidth be obtained by Dave's previously mentioned (yet unheard of anywhere else) "New Memory Manager"?

 

[Druga Runda]

So with all the leaking that's starting to happen . .can we expect the R5xx variants to be announced by the end of the month?(as suggested by ATI CEO two months ago) Although availablility is to be expected end of September I take it.(R520XL)

Expect retail availability of these cards in November.

To me this is Christmas season

 

[Geo]

The 700Mhz GDDR3 will help a bit to feed all the 12 pipes.

Core speed and mem speed of the RV530XT are supposedly also the same for the R520XT while the R520XL will rock at 500/500.

R520XL same number of functioning units as XT? Not another X800Pro?

 

[MistaPi]

RV530 won't give you much clue to R520. RV515 will though.

So its more or less confirmed that R520 will have 16 pipelines?

 

[Geo]

16-1-1-1 R520 
16-1-3-1 R580
 4-1-3-2 RV530
 4-1-1-1 RV515

I'm kinda as to where this leeds for R580 ...

Anyways, 1.4ns memory on the mid-range cards should indicate a plenty supply, lets hope that also implies some faster bins available for the high-end soon. Oh yeah, and I'm getting tired of 128-bit memory busses.

Hence my "tris" joke. Dave's later seems to suggest that pipelines aren't even addressed in this numbering scheme, which makes one wonder what the 16's are. . .

Or they switched numbering schemes twixt the top-end parts and bottom end parts without providing a key (the bastards).

 

[Jawed]

If that is true and the RV530 does do 7200M and it does have only 12 pipes and is 4-1-3-2 then could the rest of the bandwidth be obtained by Dave's previously mentioned (yet unheard of anywhere else) "New Memory Manager"?

That's what I'm expecting - improved bandwidth efficiency (along with a TMU-pool to make texturing run more efficiently). Who knows, eh?

Jawed

 

[CJ]

R520XL same number of functioning units as XT? Not another X800Pro?

I believe so. I think they're getting rid of the PE tag just like nV is getting rid of their Ultra tag. Or they could be saving it for something faster. There is a R520Pro on the roadmap but not much is clear - at least to me - about that one. So they could be saving that for R520s with less functional units than the XT/XL.

Edit: oh wait, just remembered that they've got the R520LE too. So I dunno what's up with the pro.

 

[Jawed]

OK, I think I'm going to have one last stab at this #-#-#-# thing before giving up entirely (famous last words):

texture pipeline count - ? - fragment pipelines per texture pipeline - ?

See , massive progress

Jawed

 

[chavvdarrr]

OK, I think I'm going to have one last stab at this #-#-#-# thing before giving up entirely (famous last words):

texture pipeline count - ? - fragment pipelines per texture pipeline - ?

See , massive progress

Jawed

add that 4th digit is z-ops per pipe
Now, where is our award?

 

[Geo]

. . . then could the rest of the bandwidth be obtained by Dave's previously mentioned (yet unheard of anywhere else) "New Memory Manager"?

The AT piece we're discussing mentions both "a new memory controller" and that these parts are using GDDR3. So that apparently wouldn't be the "new" part.

 

[Xmas]

I would say that you need to consider what are the important elements (other people are considering "pipelines" to be and then a case of "do the math".

Traditionally, fragment pipelines consist of at least one ALU, at least one TMU, and some would say one ROP, but I don't expect this to be the case here. So the mention of 12 Pipelines for RV530 seems to imply that it has 12 of at least one of those units. And from past comments from ATI and the direction shaders are heading, it seems obvious that it's 12 ALUs. The other numbers could indicate that it has 8 TMUs and 4 ROPs, while RV515 has 4 ALUs, 4 TMUs and 4 ROPs (and much less memory bandwidth).

 

[Geo]

I believe so. I think they're getting rid of the PE tag just like nV is getting rid of their Ultra tag. Or they could be saving it for something faster. There is a R520Pro on the roadmap but not much is clear - at least to me - about that one. So they could be saving that for R520s with less functional units than the XT/XL.

Edit: oh wait, just remembered that they've got the R520LE too. So I dunno what's up with the pro.

Well, you're suggesting above that R520XT is 600mhz. . .that looks a little scary on the low side to me; how confident are you in your sources?