Revolution's Broadway CPU to be G3+VMX variant?

[Fafalada]

from what I've read, on a technical level, gekko doesn't have a typical SIMD implementation, but rather a "split" FPU. I suppose in practice it makes little difference though...

FPU registers hold 2x32bit data type, operated by a set of extended instructions. Sounds exactly like a SIMD to me Yes it shares the register file with the scalar FPU, but so does SH4, and a few other SIMD implementations.
Obviously they chose 2-way to save costs, both for design and implemenation.

And like I said, it matches the most common 4-way x86 SIMDs in throughput and beats them in utilization.
I suppose if 750VX were to be used we'd get VMX in addition to this, so it could get the same FPU throughput per cycle that MS and Sony claim for their PP cores.

 

[Urian]

1MB of L2 cache are 48 milions of transistors. If Nintendo uses 1T-SRAM+Special controller for it they will have less transistors and the same performance and with it they can hit a better clockspeed or having a cpu with less power consumption but with the same power.

PowerPC G3+Multithreading+1T SRAM L2 Cache=Broadway.

 

[Tahir2]

I can't see Nintendo or anyone in their right mind using such old technology and bolting it to a new process and hoping for the best. hang on didn't Intel do that with the Pentium-M?

 

[Megadrive1988]

I would be disappointed if Broadway is heavily based on G3 even with improvements.

the least it should be is a streamlined G4. or dual PPE derivatives.
G3 is simply way to old no matter how you beef it up.

 

[Urian]

The G4 is not more than a G3+VMX, nothing more than this.

 

[Saem]

I can't see Nintendo or anyone in their right mind using such old technology and bolting it to a new process and hoping for the best. hang on didn't Intel do that with the Pentium-M?

Not in the slightest, many people have run away with the idea that's it's based on PIII, it's actually quite the radical departure from what little information is out there.

 

[Li Mu Bai]

The G4 is not more than a G3+VMX, nothing more than this.

You completely sure about this Urian? I would hate to research the tech. specifics.

 

[randycat99]

In spirit, that is essentially what a G4 was- basically the G3 core + enhanced FPU + SIMD engine. Now where the 2 lines have ended up since the 90's may leave the 2 fairly distant, especially where pipeline stages are involved. The formula is still the same, however. If you are talking about a G3 + SIMD, you are essentially talking about a G4 design. If you want to talk about a G3 with enhanced clockability, then you essentially end up where the most recent G4's already are. So why doesn't Nin just spec a G4 for Rev? It's not like the "3" in G3 has some magical power. Incidentally, Nin could have spec'd a G4 for GC, just as easily. It existed. It was developmentally ahead of the G3 line. Yet, with the 2-way SIMD, they essentially landed a "G3.5", as far as G4 performance for the time.

It's all good, however. I don't mean to say Gecko was not a good design. It seems to do its job well. I just thought it was a bit humorous to see G3 and G4 in such juxtaposition for this discussing (almost seeming like a G4 isn't "good enough" to be a candidate against some "enhanced" G3).

 

[PC-Engine]

I think the reason why Nintendo didn't go with the G4 for GCN was due to die size and the fact the G3 with it's 2-way SIMD balanced well with the Flipper GPU. There was really no point in using a bigger more powerful chip when it would just make the system less balanced and more costly. Also Motorola would've had difficulty supplying the volume Nintendo needed. Anyway here's IBM's reasoning for going with the 2-way SIMD in Gekko.

"Conventional wisdom is that four-way is actually better, but this is not necessarily true," West said. "Two-way is actually pretty much as powerful as four-way, plus it takes up less silicon and it's easier to make it go fast. We're going to try to complete two instructions every cycle."

 

[Shogmaster]

So why doesn't Nin just spec a G4 for Rev?

Because it's IBM that is doing the CPU, not Motorola/Freescale.

PPC 750 (G3) = IBM and Apple.
PPC 7500 (G4) = G3 + Altivec. Altivec = Motorola/Freescale.

PPC 750GX = 130nm version of 750CXe with 1MB of L2 cache and higher clock.
PPC 750VX = PPC 750GX + VMX @ smaller fab and higher clock.

 

[swaaye]

Yeah but remember Gamecube originally was specced to have a 400MHz CPU and a 200MHz GPU. That was changed not long before launch to 475/162 or so. It was said it was mainly done because developers wanted more CPU power over GPU power. I guess the clocks matched up with some hardware clock dividers.

 

[randycat99]

That quote is all over the place. Maybe not so much "damage control", rather "what we were able to squeeze onto a chip just happens to be THE ideal solution". Some may be inclined to believe it w/o question, just as some may not.

 

[randycat99]

Because it's IBM that is doing the CPU, not Motorola/Freescale.

PPC 750 (G3) = IBM and Apple.
PPC 7500 (G4) = G3 + Altivec. Altivec = Motorola/Freescale.

PPC 750GX = 130nm version of 750CXe with 1MB of L2 cache and higher clock.
PPC 750VX = PPC 750GX + VMX @ smaller fab and higher clock.

I believe IBM has since gone on to making G4 compatibles (a G4 - Altivec + VMX), as well. I see your point, however, that GC may have juuuuust been outside the time window to capitalize on IBM "G4's".

 

[PC-Engine]

Yeah but remember Gamecube originally was specced to have a 400MHz CPU and a 200MHz GPU. That was changed not long before launch to 475/162 or so. It was said it was mainly done because developers wanted more CPU power over GPU power. I guess the clocks matched up with some hardware clock dividers.

They could've kept Flipper at 200MHz and upped Gekko to 600MHz too but total power consumption would've been higher.

 

[Shogmaster]

They could've kept Flipper at 200MHz and upped Gekko to 600MHz too but total power consumption would've been higher.

Also, lower yields for 600Mhz Gekko would have been too costly for GC. 600Mhz 750CXe equipped iBooks were way more expensive over the slower ones.

 

[Fafalada]

I would suspect the bigger issue were the Flipper yields at 200mhz.
750CX cores were already scaling up to at least 800mhz at that time IIRC.

 

[Shogmaster]

I would suspect the bigger issue were the Flipper yields at 200mhz.
750CX cores were already scaling up to at least 800mhz at that time IIRC.

The fastest iBook using 750CXe available was 600Mhz (late 2001). 750FX took over from 600Mhz up to 900Mhz (was suppose to scale to and over 1Ghz but IBM had problems). Then Apple swtiched to Moto's G4s to go beyond 1Ghz.

BTW, back when they adjusted the clockspeeds on the chips, I suggested that maybe Flipper was having yield problems @ 200Mhz and I got pelted with eRocks by all the Nintendo fans.

 

[Fafalada]

Well you know, it's just like NV2a was scaled down to 233 just for the fun of it, not because there would be any problems with clocking higher

 

[Shogmaster]

Well you know, it's just like NV2a was scaled down to 233 just for the fun of it, not because there would be any problems with clocking higher

Yeah, It's a routine thing, not some end of the world deal that invalidates the whole design. You have to yield to yield, ya know what I'm sayin'?

 

[Saem]

Are the G5 binary compatible? And even if they aren't, the difference is rather between the two architectures is rather minor IIRC.