Redwood & Yellowstone new (?) specs

McFly

Veteran
Rambus Redwood Interface

Redwood - The Industry's Fastest Parallel Bus Interface Technology

The Rambus Redwood family of parallel bus interface products represents a significant breakthrough in logic chip-to-chip interface technology. Offering data rates of 400 MHz to 6.4 GHz, Redwood interface products run up to ten times faster than today's best-of-class processor busses, while reducing overall package, board, and system costs. Optimized for intra-board environments, it provides an ideal low-latency and low-power solution for high-volume, low-cost applications, including processor, chipset and network chip connections for a broad range of applications. Redwood interfaces can be backward compatible with existing LVDS-based standards, including HyperTransportâ„¢, SPI-4 and RapidIO, allowing easy integration into next-generation products, while providing a path to higher levels of performance. Redwood interfaces provide a complete physical layer solution for both standards-based and proprietary applications. Rambus can also provide both the physical layer and logic layer for proprietary applications.

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Redwood Technology Building Blocks Provide Flexibility, Performance and Savings in System Design

In addition to breakthrough bandwidth, Redwood parallel bus interfaces provide flexibility, simplicity and savings in system design through three innovative building blocks:
* FlexPhase circuit technology is a major departure from traditional circuit technologies. It enables precise, per bit, on-chip alignment of data and clock, eliminating the need for PCB trace length matching and PCB timing constraints. This results in logic systems that are simpler, more compact, lower in cost, and capable of multi-GHz data rates.
* DRSL (Differential Rambus Signaling Level) with LVDS (Low Voltage Differential Signaling) enables backward compatibility. DRSL is a differential signaling technology available in bi-directional and uni-directional versions that offers a high-performance, low-power, cost-effective solution for transmitting data on and off chip. DRSL uses a variable signal swing as low as 200 mV, enabling low-power operation, reduced electro-magnetic radiation (EMR) and scalability for lower process voltages in the future. LVDS support enables backward compatibility to industry standards such as HyperTransport, RapidIO, SPI-4, and other varieties of LVDS signaling.
* Variable Date Rate (VDR) delivers data rates of 1-to-10 times the speed of the clock, supporting a wide range of system clocks and data rates ranging from 400 MHz - 6.4 GHz.

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Redwood Extends the Versatility of Rambus Logic Interface Products

The Redwood family of high-performance parallel bus interface products extends the versatility of Rambus' logic interface solutions and complements the RaSer high-performance serial link interface family. Redwood interfaces are ideal for intra-board applications with shorter-distance (up to 15") and lower-distortion interconnects. In these applications, Redwood parallel busses provide lower power and lower latency than traditional serial link solutions. RaSer serial link interfaces are ideal for inter-board applications and are optimized for longer distances (up to 48"), higher distortion environments, and multiple connectors. For applications that span both environments, Rambus will work with customers to determine the optimal solution for their needs. Taken together, Rambus' logic interface products provide customers with a range of standard-compatible and custom solutions to meet their needs for high-performance parallel bus and serial link connectivity.

This is for a bus length of up to 38cm, so if this really will be used in the PS3, then the speed can go up. At 6,4Gb per pin at a 128bit bus --> >100GB/s

You can already order it? Looks like the PS3 could have different specs then. Hmmm ....

Fredi
 
I'm hopeing PS3 has at least 1 GB of that rambus Yellowstone asssuming Sony doesn't switch memory providers.

the PS2 should have had at least 128 MB main memory and 32MB eDRAM
on GS to takw advantage of its power. developers said PS2 needs 4x as much main memory than it has.

100 GB/sec main memory bandwidth would be fantastic for PS3. perhaps we'll see over 1 TB of bandwidth for the Vistualizer and possibly even the
Broadband Engine as well.
 
PC-Engine said:
HyperTransport 2 will have similar performance to Redwood.

I read it somewhere (think on news.com) that by 2004 there will be an advanced version of Redwood.
 
megadrive0088 said:
I'm hopeing PS3 has at least 1 GB of that rambus Yellowstone asssuming Sony doesn't switch memory providers.

the PS2 should have had at least 128 MB main memory and 32MB eDRAM
on GS to takw advantage of its power. developers said PS2 needs 4x as much main memory than it has.

100 GB/sec main memory bandwidth would be fantastic for PS3. perhaps we'll see over 1 TB of bandwidth for the Vistualizer and possibly even the
Broadband Engine as well.

:LOL: :LOL: :LOL:
Dreams, everyone should have em!
 
Deepak said:
PC-Engine said:
HyperTransport 2 will have similar performance to Redwood.

I read it somewhere (think on news.com) that by 2004 there will be an advanced version of Redwood.

Maybe, but I doubt it. Obviously the clock frequencies might go up, but all of the competing technologies will get clock gains.
 
Deepak said:
PC-Engine said:
HyperTransport 2 will have similar performance to Redwood.

I read it somewhere (think on news.com) that by 2004 there will be an advanced version of Redwood.

Yeah, I'm sure Sony will not use this first version of Redwood. If I'm wrong, then Sony would have did something wrong with Rambus cause everyone can already "order" this Redwood technology if I not read the article wrong and Sony payd them a lot of money for the extra development.

Fredi
 
McFly said:
Yeah, I'm sure Sony will not use this first version of Redwood. If I'm wrong, then Sony would have did something wrong with Rambus cause everyone can already "order" this Redwood technology if I not read the article wrong and Sony payd them a lot of money for the extra development.

Fredi

I guess Sony is going to have something custom designed!
 
Xbox 2 and GCN 2 will probably be using HT2 or PCI Express or even proprietary technology. PCI Express scales to 12 GHz btw.
 
Hmm... so what will the next 'flavour' of RDRAM be called? Following previous convention it should be ERDRAM... but what would the E stand for?
 
*Panajev smacks Vince in the head ( lightly ;) )

It's where Yogy and Bubu the bears live !

Yes, the so called mr. computer engineer know-it allKutaragiu embarked in another crappy design...






;)
 
From the link you provided:

Yellowstone is expected to achieve data rates of 3.2 to 6.4 GHz, enabling 50 to 100 GB/sec of memory system bandwidth.

This technology is INTENDED to be used in the next Rambus memory technology, while Redstone is used for interconnects... ;)
 
Panajev2001a said:
From the link you provided:

Yellowstone is expected to achieve data rates of 3.2 to 6.4 GHz, enabling 50 to 100 GB/sec of memory system bandwidth.

This technology is INTENDED to be used in the next Rambus memory technology, while Redstone is used for interconnects... ;)

From the link I provided......

"The Yellowstone memory interface provides a quantum leap in memory bandwidth..."
 
you do realize than when they introduced Direct RAMBUS they basically said the same thing MEMORY INTERFACE providing etc... etc...

the interface and controller are the most important pieces in a certain sense... at the very heart DRAM cells are DRAM cells...

Yellowstone is not a general interconnect technology, Redstone is ( more or less ;) )
 
Panajev2001a said:
The Yellowstone memory interface provides a quantum leap in memory bandwidth...

Thank you... < Pats Panajev on head >

I doubt the PS2 will use 128bit bus, I'd say 256 making that over 200 GB of bandwith.

Whoa.. I question this to an extreme. Lets not get carried away, lets be reasonable. This is external bandwith remember; I'm not who likes to post my predictions, but I'll say 30-75GB/sec on the extremes of the range, with the mean at 50GB/sec.

This needs to be cost effective remember, and I'm not sure the pin-out on a 128 or 256bit bus. Also, being a Cellular Design, the core should contain a reasonable block of eDRAM (eg. Speculation @ 64MB, which seems large) as per the computing ideals behind it. So, external bandwith needs are hard to predict with what I know - if anyone would like to follow up...
 
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