Would it be fair to say that if the overhead is low that it would scale very well?DemoCoder said:The ATI architecture is essentially a client-server distributed architecture. Kinda cool way to increase fab/yields when your process doesn't allow you to fit as much on a single core as you'd like.
If performance per/transistor is roughly on par with non unified architectures then it seems like a great design to populate a product line with. If memory buses are the same along with the arbiter and the only difference is the number of ALU's then Sireric might need to find something more exciting to work on. Would such a design be similar in that if a number of ALUs were bad they could just be disabled like pipelines are today?DaveBaumann said:It should probably scale better than current solutions as it makes savings all round - power is saved because you are always using ALU's for one thing or another and never waiting for either VS or PS to finish something (and its not really possible to clock either down while they are not doing anything), and you'll also make saving on things like buffering between VS and PS.
Inside the Smart 3D Memory is what is referred to as a 3D Logic Unit. This is literally 192 Floating Point Unit processors inside our 10MB of RAM. This logic unit will be able to exchange data with the 10MB of RAM at an incredible rate of 2 Terabits per second. So while we do not have a lot of RAM, we have a memory unit that is extremely capable in terms of handling mass amounts of data extremely quickly. The most incredible feature that this Smart 3D Memory will deliver is “antialiasing for free†done inside the Smart 3D RAM at High Definition levels of resolution. (For more of just what HiDef specs are, you can read here. Yes, the 10MB of Smart 3D Memory can do 4X Multisampling Antialiasing at or above 1280x720 resolution without impacting the GPU. So all of your games on Xbox 360 are not only going to be in High Definition, but all will have 4XAA applied as well.
Excellent idea!Rockster said:Isn't the 64 concurrent threads derived from 48 which can be assigned to each of the ALU's and 16 others which are assigned to the TMU's?
eSa said:I'm not gonna say anything... Just read;
http://www.hardocp.com/article.html?art=Nzcx
Especially, this part:
Inside the Smart 3D Memory is what is referred to as a 3D Logic Unit. This is literally 192 Floating Point Unit processors inside our 10MB of RAM. This logic unit will be able to exchange data with the 10MB of RAM at an incredible rate of 2 Terabits per second. So while we do not have a lot of RAM, we have a memory unit that is extremely capable in terms of handling mass amounts of data extremely quickly. The most incredible feature that this Smart 3D Memory will deliver is “antialiasing for free†done inside the Smart 3D RAM at High Definition levels of resolution. (For more of just what HiDef specs are, you can read here. Yes, the 10MB of Smart 3D Memory can do 4X Multisampling Antialiasing at or above 1280x720 resolution without impacting the GPU. So all of your games on Xbox 360 are not only going to be in High Definition, but all will have 4XAA applied as well.
WHATTA HELL ???!!
No. R500 outputs pixel fragments (and AA samples) into the EDRAM module.
Evidently the system is automatically set up to do a Z only pass first...