R420 on .11?

[karlotta]

TSMC is only one fab, and as I showed in a previous link they are having ongoing Low-K troubles at 0.13 microns, let alone 0.09 microns.

"TSMC is only one fab", is THE fab. As in with out them no gfxcards for you.( Well not many, and not at a good price)

" they are having ongoing Low-K troubles at 0.13 microns, let alone 0.09 microns", you seem to go out of your way to dis, and or find fault with TSMC.
Every Fab has had issues with .13 and now .09. On a production scale id say they are at the top in .13, with Intel, and AMD. Be sure to follow the money when you find all that FGS talk.......

 

[Sxotty]

I don't have any proof to hand, but my theory for the ongoing popularity of FGS vs other Low-K solutions is that it provides greater physical strength that better resists the attempts of copper the deform and change shape (glass is essentially inflexible, compared to polymers - most advanced Low-K solutions are polymer based and thus quite fragile).

Many types of glass are actually quite flexible. Only certain types of glass are brittle.

 

[Me]

Terribly Ironic

Just thinking how ironic it would be if nvidia ended up winning this generation with a slower clocked design on an older process with twice as many shader units as the compition.

Note: I know we don't know how many shader units ATI is going to have, and no, I'm not predicting that nvidia will win in performance either.

 

[{Sniping}Waste]

TSMC is only one fab, and as I showed in a previous link they are having ongoing Low-K troubles at 0.13 microns, let alone 0.09 microns.

I don't have any proof to hand, but my theory for the ongoing popularity of FGS vs other Low-K solutions is that it provides greater physical strength that better resists the attempts of copper the deform and change shape (glass is essentially inflexible, compared to polymers - most advanced Low-K solutions are polymer based and thus quite fragile).

You forgot copper migration.
The low-k that ATI is using is Black Diamond and its silicon carbid and not glass.

 

[webmedic]

Transition to 0.11 micron technology will probably start in the second half of 2004... Hence, all next-generation ATI’s VPUs will be made using 0.13 micron technology, while the future generation graphics products, such as code-named ATI R500, will be manufactured using 0.11 micron technology. It is also possible that ATI will make a less complex graphics processor for mainstream or value market segment using 0.11 micron technology for evaluation the process in the second half 2004.

As I read it - R500 will be on 0.11, R420 will be 0.13 and some budget chip (most likely based on R3xx - i.e. not next-gen) will be 0.11

yes but look at that second half of 04 and r500 in the same context. Hm the r500 is going to be very intereesting.

 

[Tim Murray]

After .13u, the next process that uses low-k is .09u, correct?

From TSMC, yes. There will not be non low-k variants of 90nm though (at least, at this point in time).

Ding Dong. You're wrong.
http://www.reed-electronics.com/ele...413350?industryid=22108&industry=Business

All the more reason for the industry to make cooperative efforts in the form of licensing IP and in non-competitive R&D through consortia, Newberry said. He noted that it has taken five years to implement true low k dielectric films, and even at the 90nm node it's not clear that the industry has been successful, he added. Many here suggest the bulk of interconnect dielectric films used in production will once again be fluorinated silicon glass at the 90nm node.

Ding Dong READ THE ****** QUOTE.

After .13u, the next process that uses low-k is .09u, correct?

To which Dave replied, yes. Your quote says that hey, certain firms might use FSG instead of Black Diamond or some other kind of low-k dielectric. My quote said that "after .13u, the next process that will use low-k at all, not necessarily exclusively, is .09u." Christ.

Oh, and I thought we already illustrated to you that TSMC's low-k "troubles" are meaningless for video cards because they don't reach temperatures of 150+ degrees. Hmmmmmmm? God forbid you read anything anyone else posts--it might interfere with the crap you've been spewing for the past year and a half.

 

[3dilettante]

I don't have any proof to hand, but my theory for the ongoing popularity of FGS vs other Low-K solutions is that it provides greater physical strength that better resists the attempts of copper the deform and change shape (glass is essentially inflexible, compared to polymers - most advanced Low-K solutions are polymer based and thus quite fragile).

I remember reading an article commenting on TSMC's low-k problems. The main problem that was discussed wasn't a structural failure with the dielectric, but a reoccurrence of a collapsed via problem they had thought fixed earlier. It wasn't too common, and was under stress testing, but from a reliability tester's standpoint, a few failures in a test batch can lead to unacceptable failure rates when a chip is mass produced.

The low-k dielectric expands more than the metal interconnect, creating strain, especially on the vias between two layers that expand on heating in the chip. Previously, the larger line widths allowed sufficient tensile strength to resist this thermal expansion.

The confluence of low-k dielectrics and small geometries creates a double whammy from a mechanical perspective, as the dielectric expands more than copper, which is simultaneously weakened by being laid out in smaller vias.

 

[asicnewbie]

For what it's worth, the Artisan 0.13u standard-cell libraries for TSMC are rated/characterized at 3 operating-points 'fast, typical, slow.' The fast-case is rated at 0 celsius (or sometimes -40 celsius.) The slow-case is rated at 100degrees celsius (212 Fahrenheit for us 'yanks who hate the metric system...) But that's only half the story. The other half is the 'package' in which the silicon-die is placed. Heat-dissipation/tolerance varies from package-frame to package-frame. Commercial-grade PQFP (plastic quad flat packs) have all-around lousy thermal properties, but are dirt cheap. The more expensive BGAs and FC-BGAs offer better heat-dissipation (and support greater pin-count per die.) Beyond that, 'industrial-grade' packages are spec'd for a wider (more extreme) temperature range. But in most consumer-apps, the package dictates the IC's temperature-spec, and not the silicon.

Having said all that, there is *no evidence* to suggest ATI/NVidia are using the 'baseline' Artisan libraries. Clearly, ATI's past statements (with respect to 'hand-tweaked layout' ) point to in-house custom cell/gate libraries.

 

[radar1200gs]

TSMC is only one fab, and as I showed in a previous link they are having ongoing Low-K troubles at 0.13 microns, let alone 0.09 microns.

I don't have any proof to hand, but my theory for the ongoing popularity of FGS vs other Low-K solutions is that it provides greater physical strength that better resists the attempts of copper the deform and change shape (glass is essentially inflexible, compared to polymers - most advanced Low-K solutions are polymer based and thus quite fragile).

You forgot copper migration.
The low-k that ATI is using is Black Diamond and its silicon carbid and not glass.

Please, try reading my posts and understanding them before making useless comments on them. I know Black Diamond is not glass based, it's polymer based. FGS is glass based Flourinated Silica Glass.

There are two main forms of metal migration, one is caused by too much power, the other is caused by the metal changing shape and deforming. The latter is the main cause of via failures on 0.13 micron processes.

 

[radar1200gs]

After .13u, the next process that uses low-k is .09u, correct?

From TSMC, yes. There will not be non low-k variants of 90nm though (at least, at this point in time).

Ding Dong. You're wrong.
http://www.reed-electronics.com/ele...413350?industryid=22108&industry=Business

All the more reason for the industry to make cooperative efforts in the form of licensing IP and in non-competitive R&D through consortia, Newberry said. He noted that it has taken five years to implement true low k dielectric films, and even at the 90nm node it's not clear that the industry has been successful, he added. Many here suggest the bulk of interconnect dielectric films used in production will once again be fluorinated silicon glass at the 90nm node.

Ding Dong READ THE ****** QUOTE.

After .13u, the next process that uses low-k is .09u, correct?

To which Dave replied, yes. Your quote says that hey, certain firms might use FSG instead of Black Diamond or some other kind of low-k dielectric. My quote said that "after .13u, the next process that will use low-k at all, not necessarily exclusively, is .09u." Christ.

Oh, and I thought we already illustrated to you that TSMC's low-k "troubles" are meaningless for video cards because they don't reach temperatures of 150+ degrees. Hmmmmmmm? God forbid you read anything anyone else posts--it might interfere with the crap you've been spewing for the past year and a half.

Actually, you might like to check Daves post in the NV40 thread where he claimed everybody would be forced to use Low-K at 0.09 microns whether they wanted to or not. I let it slide in that thread. He repeated the assertion here. He is wrong. (technically FSG isn't really Low-K).
I think I demonstrated in the other thread that you don't need high temperatures for Low-K to fail. The fact that TSMC is still having via troubles and metal layer seperation troubles is a clear indication that their Low-K process is nowhere near mature or reliable yet.

 

[Bjorn]

Actually, you might like to check Daves post in the NV40 thread where he claimed everybody would be forced to use Low-K at 0.09 microns whether they wanted to or not.

AFAIK, the only thing he has said is that TSMC won't have a "non Low-K 0.09 micron". With the added "as is it now".

 

[radar1200gs]

Actually, you might like to check Daves post in the NV40 thread where he claimed everybody would be forced to use Low-K at 0.09 microns whether they wanted to or not.

AFAIK, the only thing he has said is that TSMC won't have a "non Low-K 0.09 micron". With the added "as is it now".

Daves reply was in response to the following post by me:
http://www.beyond3d.com/forum/viewtopic.php?t=11720&postdays=0&postorder=asc&start=120

Heres the latest on TSMC and Low-K (Black Diamond). As I said earlier I would bet the farm on yields improving to much if I were ATi...
http://www.eet.com/semi/news/showArticle.jhtml?articleId=19200136

1 - thats already been discussed
2 - The issues are at high tempuratures, not 3D graphics tempuratures.
3 - You ought to be thanking ATI for bringing this to market and sorting it out for graphics as you favourite will have to use this at some time as well. Even if they don't go 130nm low-k all foundries are using it with 90nm.

 

[Dave Baumann]

As I said, according to TSMC's reasearch which was told to us two weeks ago there were no foundries offering 90nm without low-k. Greg's quote says that someone thinks foundries will be using FSG for 90nm, but we've yet to see any foundry options where that is the case.

 

[Geo]

Is there a chance that R500 will be .13? I'm remembering how surprised many were that ATI accomplished so much with R3xx at .15. If R500 must be .09, then does the timing with TSMC for .09 allow for "the ATI strategy" --having a less-complex card than your company flagship on the new process first to learn the ropes with for both company and foundry? This would imply, theoretically, that .09 would have to be out and available for 6 months or so before R500 appeared. Or ATI would have to bite the bullet and not get their "practice" ASIC to learn with.

Or am I putting too much emphasis on "the ATI strategy"? Is it really a strategy, or simply the reaction to a given set of circumstances as they existed at a given point in time --and which may never exist just that way again?

 

[asicnewbie]

Actually, you might like to check Daves post in the NV40 thread where he claimed everybody would be forced to use Low-K at 0.09 microns whether they wanted to or not. I let it slide in that thread. He repeated the assertion here. He is wrong. (technically FSG isn't really Low-K).

You know, I *swear* I've read some marketing/promotional literature implying FSG is some kind of Low-K material. The foundries which don't have the 'true' low-K pad their marketing literature with the glories of FSG (which is still better than the baseline non-FSG.) I'm trying to remember if TSMC was once one of those fabs, because if they were, that could be the basis for their creative interpretation "no merchant foundry has a non low-K 90nm process."

At a minimum, I'm pretty sure TSMC was referring to merchant foundries -- i.e. foundries that sell capacity. And not closed-shop IDMs (like Sony, Intel, etc.) who don't directly sell excess capacity.

 

[DemoCoder]

If R500 = XBOX2, then I doubt it can be .13 due to the amount of eDRAM it supposedly has. If R500 < XBOX2, then I suppose it theoretically could be .13m but given the demands of 16 pipelines, perhaps 32-48 ALUs, and SM3.0/4.0 support, and remain cool, lower power, and with good clocks, I'd assume they are targeting a more ambitious process.

 

[PatrickL]

ATI may experiment the other way around that time.

Don't you think that a R500 on a well know 0.13 low-k process but experimenting the VS/PS load balanced architecture could make sense ?

It would solve some contradictions we have for now.

On that process, R500 could be sooner than expected and still be a next gen chip.

 

[digitalwanderer]

Actually, you might like to check Daves post in the NV40 thread where he claimed everybody would be forced to use Low-K at 0.09 microns whether they wanted to or not. I let it slide in that thread. He repeated the assertion here. He is wrong.

As I said, according to TSMC's reasearch which was told to us two weeks ago there were no foundries offering 90nm without low-k. Greg's quote says that someone thinks foundries will be using FSG for 90nm, but we've yet to see any foundry options where that is the case.

I don't know why, but this made me laugh just as hard as Doomtrooper's card of John/Ruby yesterday!

 

[radar1200gs]

Actually, you might like to check Daves post in the NV40 thread where he claimed everybody would be forced to use Low-K at 0.09 microns whether they wanted to or not. I let it slide in that thread. He repeated the assertion here. He is wrong. (technically FSG isn't really Low-K).

You know, I *swear* I've read some marketing/promotional literature implying FSG is some kind of Low-K material. The foundries which don't have the 'true' low-K pad their marketing literature with the glories of FSG (which is still better than the baseline non-FSG.) I'm trying to remember if TSMC was once one of those fabs, because if they were, that could be the basis for their creative interpretation "no merchant foundry has a non low-K 90nm process."

At a minimum, I'm pretty sure TSMC was referring to merchant foundries -- i.e. foundries that sell capacity. And not closed-shop IDMs (like Sony, Intel, etc.) who don't directly sell excess capacity.

Technically it isn't a true Low-K material, however it is frequently used as a Low-K substitute.

As for no foundries using FSG at 0.90, time will tell...

Edit NV30 was non FSG, NV35 was FSG. I can't recall if NV31 was FSG or not. I suspect early chips were not and later one were.

 

[karlotta]

boyhowdey, this has gone on abit, That link to reed says jacksht, Just a "insiders" fluff. And like you say radar1200gs onlytime will tell. Would like some links other than He said She said. You havent proved anything to show what TSMC has told Dave is wrong. Its Low-K at 9 to me , in all the reading i can find.