PCB probably seems busy because theres fewer layers.
R420 on .11?
- Thread starter Ardrid
- Start date
The Baron said:
From TSMC, yes. There will not be non low-k variants of 90nm though (at least, at this point in time).
loekf2 said:
Because TSMC doesn't offer it. 110nm is purely a "Value" line from TSMC and not a performance line.
Yeah, but .11u wasn't ready when RV360 was designed/launched. It's brand new, I think, and the .13u low-k in the RV360 gave them experience with the nuances of the process at TSMC. I'd expect ATI's higher-level mainstream cards to keep progressing with more advanced "performance" processes, and the experience gained from that will be used in the next generation's high-end card.geo said:
RV360 is also not a "value" part for its segment.
The Baron said:
Oh, I think there's a lot to be said for ATI's strategy in this regard, particularly from an experience and risk-reduction pov. It just seems to me that TSMC thwarted them a bit in pursuing it with the way they (TSMC) decided to handle 110nm. This is assuming that Dave is hinting that the Inquirer article is full-of-it.
RV350 is certainly getting there....DaveBaumann said:
radar1200gs
Regular
Ding Dong. You're wrong.DaveBaumann said:
http://www.reed-electronics.com/ele...413350?industryid=22108&industry=Business
{Sniping}Waste
Regular
loekf2 said:
Agree
he nailed it
I know Micron dose the same thing and about all of the mem is on .11. Know the layout has to be layouted to do this first.
Talk to TSMC. At the moment they are only offering low-k 90nm and their research says that no other manufacturers are offering an FSG node.radar1200gs said:
radar1200gs said:
hmmm, well this cant be right then....
TSMC established the Nexsys brand for its next-generation SoC process technology platform. The company's 90-nm technology is the first TSMC process to adopt this brand. Nexsys offers a unique triple gate oxide option that facilitates three different oxide thicknesses on a single chip. The triple gate oxide feature removes design restrictions caused by various core/IO combination requirements and should lead to more innovative SoC designs. With 70-75% linear shrinkage and a two-times performance improvement, compared to TSMC's 0.13-Micron technology, Nexsys is poised to become the de-facto SoC process technology platform standard.
The 90-nm process technology features:
* Core supply voltage ranging from 1.0V to 1.2V
* I/O and analog blocks ranging from 1.8V to 3.3V
* Multiple threshold voltage (Vt) option for optimized transistor speed and power consumption trade-offs
* Extremely tight process control for 50-nanometer gate length - the high speed process
* Ni-salicide for better sheet resistance (Rs) in narrow line widths
* Nine-layer copper interconnect, with an extra redistribution layer optional for flip-chip package
* Low-k dielectrics with k less than 2.9 for the lowest RC delay and power consumption
That last point sure looks like Low-k to me
radar1200gs
Regular
TSMC is only one fab, and as I showed in a previous link they are having ongoing Low-K troubles at 0.13 microns, let alone 0.09 microns.
I don't have any proof to hand, but my theory for the ongoing popularity of FGS vs other Low-K solutions is that it provides greater physical strength that better resists the attempts of copper the deform and change shape (glass is essentially inflexible, compared to polymers - most advanced Low-K solutions are polymer based and thus quite fragile).
I don't have any proof to hand, but my theory for the ongoing popularity of FGS vs other Low-K solutions is that it provides greater physical strength that better resists the attempts of copper the deform and change shape (glass is essentially inflexible, compared to polymers - most advanced Low-K solutions are polymer based and thus quite fragile).
