Question on the R6xx

[Unknown Soldier]

With the R6xx apparently using alot of the Xenos features .. what will ATI have to do to make the R6xx SM4.0 compliant since Xenos is not fully SM4.0 compliant?

Thx
US

 

[Xmas]

That's difficult to say since we don't know exactly what's supported at the hardware level. Some things could be broken down do simpler instructions, while others would be horribly expensive. I guess ATI would need to add special number handling, 32bit integer support, texture arrays, texture addressing with offset, SampleCmp, sRGB correction before filtering and probably instance/primitive/vertex ID.

 

[JHoxley]

Wonder if they'll try and cheat their way into a "D3D10 Compatable" release. Like they did with vertex texturing/SM3/X1k's

Jack

 

[Unknown Soldier]

Thx for your guess Xmas.

We've recently been given an image of the Xenos graphics chip package (above) that highlights the dual die nature, with the parent die quite clearly to the centre of the package and the daughter over to the left. While the 232M transistor figure for the parent was given to us by ATI we are still trying to establish a more official figure for the daughter (even though these types of transistor counts are very much estimates anyway). We've speculated that the 150M figure that appeared when XBOX 360 was first announced may just relate to daughter die, however another figure that has arisen is 100M - judging from the die sizes the daughter die doesn’t have more than half the area of the parent, which would giv indications towards the 100M side although 80M of those transistors are DRAM which may be more dense than the logic circuitry that will dominate the parent die. We are trying to get further clarification.

http://www.beyond3d.com/articles/xenos/index.php?p=02

I wonder how many more transistors the R6xx will have over Xenos .. since they'll need to fix the chip for SM4.0 compatibility. With the R580 being around 384 Million .. what would a good figure be for the R6xx? R420 Million?

US

 

[no-X]

I think we could await more ALUs (or "unified shader units"). R580 has 48 units for pixel shading and 8 units for vertex shading (=56 total). Xenos has 48 units enabled (total). I don't await anything less than 64 units for R600. And I think that even 96 isn't excessive number... Xenos is very small on 90nm, so there should be a lot of die-space to use @80nm/65nm (my theory, don't bite me please).

 

[SugarCoat]

Wonder if they'll try and cheat their way into a "D3D10 Compatable" release. Like they did with vertex texturing/SM3/X1k's

Jack

This shouldnt happen anymore in order for any company to call their cards "Fully WGF2.0/DX10 compliant." Microsoft does not want any graphics card company implimenting (excuse my language) half assed versions of direct X like what happened with DX9/DX9C and SM2.0, SM2.0C, SM3.0 etc.. as well as PS1.1/1.4 way back when. It benefits nobody and makes much of the work the Direct X team does totally useless if manufacturers can skip support for key features or basic functions/support. Also plays problems with game developers with what to support for a certain userbase. Technically both companies will need to support all features of any given DX version (dictated by MS) to be called fully compatible/compliant. Starting with vista we should see no variation in what any company supports within the DX versions. Anything that differs will be customizations/optimization of any company seperate of what basic features which any must support. For example under the new rule using SM3.0 and the R520 as an example, ATI would have to support vertex texture fetch, however they can also, in addition, add their own custom render to VB as well and recieve certification. So its a great thing as no matter what card you buy within a given time frame, you will have the key support, and companies have the flexability to add in their own optimizations and custom ways of doing things as well.

 

[Tim]

I think we could await more ALUs (or "unified shader units"). R580 has 48 units for pixel shading and 8 units for vertex shading (=56 total). Xenos has 48 units enabled (total). I don't await anything less than 64 units for R600. And I think that even 96 isn't excessive number... Xenos is very small on 90nm, so there should be a lot of die-space to use @80nm/65nm (my theory, don't bite me please).

Remember that a Xenos shader unit only can do 1 scalar + 1 vec4 - 64 Xenos like shader processors will not be able to match the r580. I money is on 96 or 128 units.

 

[Unknown Soldier]

How will the 96 shader units be defined? 32Pipes with the 3 ALU's or some other method? Maybe increase the ALU's or something else?

US

 

[Tim]

How will the 96 shader units be defined? 32Pipes with the 3 ALU's or some other method? Maybe increase the ALU's or something else?

I would assume that the R600 has the shader processors organized in arrays like Xenos. So 96 would be 6 arrays with 16 shader processors. In Xenos pipes in the old sense does not really exist as everything is decoupled.

 

[SugarCoat]

How will the 96 shader units be defined? 32Pipes with the 3 ALU's or some other method? Maybe increase the ALU's or something else?

US

its broken down in shader pipes and operations per cycle (xenos =2 operations per pipe per cycle so 48 pipes @ 2 per pipe per cycle = 96 shader operations per every one cycle in a xenos)

and there are also a number of arithmatic logic units per pipe (xenos = 4) which gives the capability to do vertex or pixel.

As far as i have seen as well, the Xenos ( and problably R6XX) wont be broken up into quads, but arrays, in the case of Xenos each one of the three working independantly and containing 16 shader pipes.

 

[Demirug]

Wonder if they'll try and cheat their way into a "D3D10 Compatable" release. Like they did with vertex texturing/SM3/X1k's

Jack

Have you find an open backdoor in the spec?

 

[Unknown Soldier]

If the Xenos is not as powerful as the R580 .. yet we expect the R6xx to be even more powerful than the R580 .. what can we expect ATI to do, to increase the R6xx performance over the R580 seeing as they going the Xenos way(maybe).

A higher core clock is one way, a higher memory clock the second. But what can ATI do to add to that? As Tim said .. maybe 128 units instead of 96? Anything else?

As for feature wise .. well Xmas added a few.

I guess ATI would need to add special number handling, 32bit integer support, texture arrays, texture addressing with offset, SampleCmp, sRGB correction before filtering and probably instance/primitive/vertex ID.

Could a 512Bit bus be a possibility? What about Fast14?

US

 

[Fodder]

What about Fast14?

My sources suggest Fast14 is integral to the success of the R600 project.

 

[MulciberXP]

My sources suggest Fast14 is integral to the success of the R600 project.

Of course

Bob Feldstein, vice president of Engineering, ATI Technologies, Inc. "We selected Intrinsity after determining that Fast14 Technology can deliver up to four times the performance per silicon dollar when compared with standard design approaches."

There you have it. And with the ArtX design team, they'll surely be able to deliver. Who knows, could be TBDR.

/me worships the mysterious Lord "Tech"

 

[JHoxley]

Have you find an open backdoor in the spec?

No, I've not found anything in the specifications that would indicate any backdoors in D3D10 :smile:

The only "backdoor" I can think of is that of performance. I've not seen anywhere that requires a certain minimum level of performance. That is, they could enable a feature so that it's compliant - but have it emulated via other features (e.g. for ATI SM2 cards you can do FP blending if you emulate it via a post-processing pass given that the hardware doesn't natively allow it). This leaves the possibility that the feature might technically work, but it's so damn slow that it's just not worth using it. Which as far as I see it isn't far off not having supported the feature in the first place

However, as the IHV's now have to compete on performance rather than features - so I doubt it'll be a problem. Time will tell though.

Cheers,
Jack

 

[Demirug]

Yes, “Software Emulation“ could be the next big fear in the Direct3D developer camp. But IMHO running slow is still better than not running at all.
I have seen some performance requirements that need to be meet to get a Vista Logo. But they seem not very high. Maybe WinSat can help a little bit.

 

[Jawed]

As far as I can tell Xenos supports texture arrays:

A special type of texture fetch can index into a texture “stack” that is up to 64 textures deep. A texture stack is a set of 2D textures (potentially with mipmaps) that are stored contiguously in memory.

Is that a texture array? Does D3D10 go further?

Jawed

 

[Demirug]

Yes this is comparable to texture arrays in D3D10. If I understand the constant values in D3D10.h right an array can contain up to 512 textures.

 

[Xmas]

Bob Feldstein, vice president of Engineering, ATI Technologies, Inc. "We selected Intrinsity after determining that Fast14 Technology can deliver up to four times the performance per silicon dollar when compared with standard design approaches."

The problem with "standard design approaches" is that, in a cutting edge market, no one uses them.

 

[Demirug]

The problem with "standard design approaches" is that, in a cutting edge market, no one uses them.

AFAIK there are no Fab optimized custom function libraries for FAST14.