Qualcomm Krait & MSM8960 @ AnandTech
- Thread starter Arun
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I believe Adreno 3xx ALUs are scalar. Rogue, too. Mali T-6xx is still vector, then?
Fill Rate -
A7's G6430
Theoretical (my estimate): 3464 MTexels/s
Measured (by GfxBench): 3368 MTexels/s (97% of theoretical spec realized)
Stencil rate on Series5XT was 16 pixels/cycle per core, including the cores with 4 TMUs. With 8 TMUs yet just one core for the G6430, perhaps 32 pixels per clock for Z ops might be the best fit. So, I'd expect that the G6430's stencil rate is 4x its texel fill rates listed above (with 2x also being a less likely possibility).
Adreno 330 @ 550 MHz
Theoretical: 4400 MTexels/s
Measured (by GfxBench, not sure if measured at 450 MHz or 550): 1601 MTexels/s
The GPU ranking for fill rate is actually pretty interesting. Mali-450 configurations might be MP8s and hence have 8 TMUs, and the T-628 MP6 might have 6.
http://gfxbench.com/result.jsp?benc...RM=true&arch-MIPS=true&arch-x86=true&base=gpu
Fill Rate -
A7's G6430
Theoretical (my estimate): 3464 MTexels/s
Measured (by GfxBench): 3368 MTexels/s (97% of theoretical spec realized)
Stencil rate on Series5XT was 16 pixels/cycle per core, including the cores with 4 TMUs. With 8 TMUs yet just one core for the G6430, perhaps 32 pixels per clock for Z ops might be the best fit. So, I'd expect that the G6430's stencil rate is 4x its texel fill rates listed above (with 2x also being a less likely possibility).
Adreno 330 @ 550 MHz
Theoretical: 4400 MTexels/s
Measured (by GfxBench, not sure if measured at 450 MHz or 550): 1601 MTexels/s
The GPU ranking for fill rate is actually pretty interesting. Mali-450 configurations might be MP8s and hence have 8 TMUs, and the T-628 MP6 might have 6.
http://gfxbench.com/result.jsp?benc...RM=true&arch-MIPS=true&arch-x86=true&base=gpu
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Adrian
Newcomer
Thanks
Then,why Adreno 330 have this bad results?and why still better Fps on Benchmark?
On a normal use(Games etc,not benchmark) what is better?
Sorry for my English
Texel fill rate still tends to be a fairly important aspect of graphics performance to a wide variety of real-world applications due to high PPI displays and the priority for high resolution assets in an app's/OS's graphical user interface. So, I would anticipate PowerVR solutions to have at least some degree of advantage driving many real-world applications, though games of sufficient complexity in graphics effects tend to stress other aspects of performance a lot more than just texel fill.
Texel fill rate isn't the aspect mostly responsible for limiting these GPUs in the main T-Rex test of GfxBench, so the Adreno 330's lower performance there isn't holding it back. The iPhone 5S has only a small advantage in that test over the 2.3 GHz S800 (450 MHz GPU) reference in the Nexus 5.
The combination of factors that tend to limit the processing speed on a particular workload at any one time can touch on all aspects of a system's performance and could also be related to bugs in the hardware, software, or benchmark itself. More insight into how this applies to the A7's various graphics benchmark results measured so far would undoubtedly be valuable in understanding those results better, yet the explanation may involve a lot of subtleties in order to fully answer the questions about its performance which have been brought up.
I don't know enough about the 330's hardware and software architectures and implementations nor GfxBench's method for counting pixels to understand why 330 devices deliver such relatively low texel rates.
Whoops... I just noticed, when mentioning stencil fill rates in my last post, that I mixed up my terminology and the point I was trying to make. I meant to write that, the Series5XT cores with 4 ALU pipelines (and probably the SGX554 with 8 ALU pipes) and 2 TMUs, balanced them with 16 Z comparators. While the number of Z units and performance scaled up with the number of cores in MP configurations, some of that scale might be deemed a little out-of-balance within a single core Series6 solution, much like how the combined vertex performance of four core SGX XT configurations has been balanced down a ways in single core Rogue implementations so far.
So, while Rogue's increased ALU and TMU count per core over Series5XT should perhaps warrant an increase from its 16 Z units per core, I'd expect a more rationalized balance with probably 32 Z ops per clock instead of something like 64.
Texel fill rate isn't the aspect mostly responsible for limiting these GPUs in the main T-Rex test of GfxBench, so the Adreno 330's lower performance there isn't holding it back. The iPhone 5S has only a small advantage in that test over the 2.3 GHz S800 (450 MHz GPU) reference in the Nexus 5.
The combination of factors that tend to limit the processing speed on a particular workload at any one time can touch on all aspects of a system's performance and could also be related to bugs in the hardware, software, or benchmark itself. More insight into how this applies to the A7's various graphics benchmark results measured so far would undoubtedly be valuable in understanding those results better, yet the explanation may involve a lot of subtleties in order to fully answer the questions about its performance which have been brought up.
I don't know enough about the 330's hardware and software architectures and implementations nor GfxBench's method for counting pixels to understand why 330 devices deliver such relatively low texel rates.
Whoops... I just noticed, when mentioning stencil fill rates in my last post, that I mixed up my terminology and the point I was trying to make. I meant to write that, the Series5XT cores with 4 ALU pipelines (and probably the SGX554 with 8 ALU pipes) and 2 TMUs, balanced them with 16 Z comparators. While the number of Z units and performance scaled up with the number of cores in MP configurations, some of that scale might be deemed a little out-of-balance within a single core Series6 solution, much like how the combined vertex performance of four core SGX XT configurations has been balanced down a ways in single core Rogue implementations so far.
So, while Rogue's increased ALU and TMU count per core over Series5XT should perhaps warrant an increase from its 16 Z units per core, I'd expect a more rationalized balance with probably 32 Z ops per clock instead of something like 64.
Qualcomm announced their successor of the Snapdragon 800 chipset, the very originally named Snapdragon 805. Here is their press release:http://www.prnewswire.com/news-rele...pdragon-805-ultra-hd-processor-232643031.html
They also announced their fourth generation LTE chipset in this press release here:http://www.prnewswire.com/news-rele...-modem-and-rf-transceiver-chip-232642981.html Should be capable of up to 300 Mbps network speeds. The Gobi 9X35 chip is build on the 20 nm node according to the press release, which is probably why it's expected to start sampling to customers early next year. The Snapdragon 805 is sampling right now, which probably means it's build on a 28 nm node.
They also announced their fourth generation LTE chipset in this press release here:http://www.prnewswire.com/news-rele...-modem-and-rf-transceiver-chip-232642981.html Should be capable of up to 300 Mbps network speeds. The Gobi 9X35 chip is build on the 20 nm node according to the press release, which is probably why it's expected to start sampling to customers early next year. The Snapdragon 805 is sampling right now, which probably means it's build on a 28 nm node.
Nebuchadnezzar
Legend
25.6GB/s bandwidth? Wider bus?
Seems like it. Not sure if we'll see the full bus width being used on a phone.
Qualcomm have confirmed that it uses Dual x64-bit wide DRAM interfaces. If they were to use faster 1866 MHz LPDDR3 in a AB / AC variant, that's almost 30 GB/s of memory bandwidth, nice! My only concern, is the impact on power consumption of the wider bus.
Interestingly, Samsung's widcon demo SoC tops out at 17 GB/s.
Nebuchadnezzar
Legend
Presumably that was the first generation demo while second generation is to actually ship in products, some sources claim the same 25.6GB/s for Wide IO2
This looks like a tablet-only chip to me. Although I've been surprised before...
Looking forward to more details!
D
Deleted member 13524
Guest
Except for the 64bit memory, this looks like an evolutionary iteration. Krait 450 shouldn't be much different from Krait 400.
It's nice to see everyone moving up the memory bandwidth, though.
If only AMD would do the same for their higher end APUs...
Shouldn't the Adreno 420 GPU in the Snapdragon 805 be a pretty big step up? From what I gather it has a much broader API support than their Adreno 3XX series GPUs. They didn't mention the exact supported APIs, but they do mention that it supports tesselation and that it has geometry shaders.
Arstechnica has an article up about the Snapdragon 805 up over here: http://arstechnica.com/gadgets/2013...n-2014-putting-qualcomm-in-even-more-devices/
It doesn't really tell you that much. It does confirm that the Adreno 420 GPU is DirectX 11 compliant. It also says that it's build on a 20 nm process node, which wasn't mentioned in the press release. Kind of weird that, you'd expect something like that to be mentioned in a press release. Maybe Arstechnica is wrong on this one? Seems unlikely, but still.
It doesn't really tell you that much. It does confirm that the Adreno 420 GPU is DirectX 11 compliant. It also says that it's build on a 20 nm process node, which wasn't mentioned in the press release. Kind of weird that, you'd expect something like that to be mentioned in a press release. Maybe Arstechnica is wrong on this one? Seems unlikely, but still.
A terrible article. Here are a few pearls. The author updated the article, regarding points 1&2, after I & another user set him straight, but point three has still not been addressed.
1) Stated that S805 is 20nm
2) "Like older Krait and Cortex A15-based SoCs, the new SoC will support 64-bit memory addressing, meaning that future Android phones and tablets running the 805 will be capable of addressing over 4GB of RAM. This isn't a full 64-bit transition like Apple's A7 made—the chip can't execute 64-bit code, and it doesn't support the new ARMv8 instruction set."
What a load of bull, Krait currently supports LPAE, a 40-bit physical address space. 805 isn't a 64-bit SoC
3)"Feeding both the CPU and GPU is a new quad-channel LPDDR3 memory interface" Wat, Qualcomm clearly stated that it's still uses a dual-channel interface, albeit each one 64-bit wide.
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Press release is here:http://www.qualcomm.com/media/relea...uces-snapdragon-410-chipset-integrated-4g-lte
There's not much in there about the specifics though.
EDIT: AnandTech has some more information on the chipset. Apparently it uses ARM Cortex-A53 cores. Here:http://www.anandtech.com/show/7573/...ed-on-64bit-arm-cortex-a53-and-adreno-306-gpu
There's not much in there about the specifics though.
EDIT: AnandTech has some more information on the chipset. Apparently it uses ARM Cortex-A53 cores. Here:http://www.anandtech.com/show/7573/...ed-on-64bit-arm-cortex-a53-and-adreno-306-gpu
