Practical benefits of a 512-bit bus

Since each DRAM pair is routed to the same ROP partition, which partition they're disabling for GTS (it's never the same one each time) will determine which pair is unused.
 
Hmm so where does the crossbar come in? I always thought that all on chip clients were connected to a switch which was in turn connected to the memory partitions.
 
Hmm so where does the crossbar come in? I always thought that all on chip clients were connected to a switch which was in turn connected to the memory partitions.
The crossbar is between the MC/ROP/L2 unit (which is a unified block in G80, it seems) and the shader clusters (ALU/TMU/L1).

There'll also be a connection across the crossbar for the vertex grouper, PCI Express and other odds and sods, I guess.

Jawed
 
I didn`t know one could write forum posts from Portuguese beaches:))

Anyway, answering to someone above saying that Quad-Core CPUs do with 771 pins...well, those don`t have to deal with AT LEAST a 256-bit bus;)

I really don`t know, it`s just that I expect ATi to actually have a desire to make some kind of profit off of its chips, and that`s unlikely if the R600 is a hugely complex, low-yielding, complex-PCB requiring monster...even though the geeky part is getting the iffies from all of the goodies that are rumoured to be packed:D
 
I didn`t know one could write forum posts from Portuguese beaches :)
If only I was still there :cry: Good to be back though, since I swear I had a dream about Humus helping me debug some shaders one night :LOL:

And what a nice thread expansion to come back to, too :cool: Bandwidth is king, it seems....
 
If you`re dreaming about Humus...erm...umm...could I reccomend the latest issue of FHM?:D
 
They could probably disable a few channels for the lower end stuff. I don't think they would need 16. Even the 8800GTS has less memory chips and a disabled memory channel.

So the memory channel is not missing, just disabled? Therefore its possible that this missing channel could be re-enabled to give the full 384bit?
 
So the memory channel is not missing, just disabled? Therefore its possible that this missing channel could be re-enabled to give the full 384bit?
Uhm... yes you could maybe enable it.
But it wouldn't do you any good since there aren't any memory modules mounted on the disabled channel. :D
 
if R600 really has a 512-bit external memory bus, then it's sooner than I expected. I expected 256-bit bus until the R700. wow if R600 has 512-bit external bus and the reported 1024-bit internal ring bus.

but then, R600 reportedly has "only" 500+ million transistors, while G80 has ~680m (or something)

then again, fewer transistors didn't stop R300 from thrashing NV30 in performance :)


more bandwidth rules. maybe AMD-ATI will use GDDR4 on the highest end model and GDDR3 for everything below.
 
I think the transistor budget is still up in the air...I also think that GDDR4 AND 512-bit bus will mean an incredibly expensive piece of hardware, probably quite a bit over what the G80 will be at that time.
 
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