Outlandish NV40 specs appear from Russian site
- Thread starter g__day
- Start date
megadrive0088
Regular
more like some NV50 variant, I would think.
asicnewbie
Newcomer
From an industry terminology standpoint, 'embedded DRAM' sometimes refers to any/all the competing strategies to put large dynamic-RAM arrays onto a standard logic process. Kind of like how the meaning of 'xerox' has evolved to mean any paper copy, even if it wasn't made using Xerox Corporation's patented process. (Sometimes my office workers make 'xeroxes' on our multifunction FAX/COPY/SCANNER machine...which uses an inkjet printing mechanism and not a xeroxgraphic one!)
I believe eDRAM is the winner in the area of density. Conventional (6-transistor per cell) SRAM is the winner in the area of speed. 1T-SRAM density approaches (but doesn't quite match) eDRAM, and its performance approaches conventional SRAM. There's more to that, I'm sure. For very large embedded RAMs ( at 0.18u), TSMC recommends eDRAM over 1T-SRAM. Though for 90nm, TSMC's development schedule is reversed (1T-SRAM at introduction, eDRAM at later date.)
Putting any type of embedded memory (eDRAM or 1T-SRAM, flash, or ROM) on standard-cell (logic) ASICs introduces all sorts of manufacturing-test issues. Since UMC/TSMC offers little to assist customers with these (extra) issues, smaller less-experienced fabless customers found it difficult to use any embedded memory in their designs. The fabs offering more extensive back-end and 'turn-key' design-services (Toshiba, Fujitsu, NEC, IBM, LSI, TI, etc.), also offered active support/assistance for interested customers, including manufacturing-test coverage and die-repair. Die-repair is post-production laser-repairing known bad (but recoverable) dies which tested bad. This involves testing the memory (while it's still on the wafer), identifying defects, determining if they are repairable, and then repairing the ones marked recoverable. The foundry's assistance goes a long way to mitigate the design-burden of using these embedded memory techs. For large memories, the laser-repair is *crucial*, because the raw (unrepaired) defect rate on large embedded RAMs (like the size in the PS2) can impact overall yield -30%. (NOte, I'm saying that 70% of the RAMs have *0* defects...I'm not saying 30% of the RAM cells in a single array are bad!)
Having said all this, companies like Sony/ATI/NVidia are easily staffed to deal with any extra design work techs like these incur.
I believe eDRAM is the winner in the area of density. Conventional (6-transistor per cell) SRAM is the winner in the area of speed. 1T-SRAM density approaches (but doesn't quite match) eDRAM, and its performance approaches conventional SRAM. There's more to that, I'm sure. For very large embedded RAMs ( at 0.18u), TSMC recommends eDRAM over 1T-SRAM. Though for 90nm, TSMC's development schedule is reversed (1T-SRAM at introduction, eDRAM at later date.)
Putting any type of embedded memory (eDRAM or 1T-SRAM, flash, or ROM) on standard-cell (logic) ASICs introduces all sorts of manufacturing-test issues. Since UMC/TSMC offers little to assist customers with these (extra) issues, smaller less-experienced fabless customers found it difficult to use any embedded memory in their designs. The fabs offering more extensive back-end and 'turn-key' design-services (Toshiba, Fujitsu, NEC, IBM, LSI, TI, etc.), also offered active support/assistance for interested customers, including manufacturing-test coverage and die-repair. Die-repair is post-production laser-repairing known bad (but recoverable) dies which tested bad. This involves testing the memory (while it's still on the wafer), identifying defects, determining if they are repairable, and then repairing the ones marked recoverable. The foundry's assistance goes a long way to mitigate the design-burden of using these embedded memory techs. For large memories, the laser-repair is *crucial*, because the raw (unrepaired) defect rate on large embedded RAMs (like the size in the PS2) can impact overall yield -30%. (NOte, I'm saying that 70% of the RAMs have *0* defects...I'm not saying 30% of the RAM cells in a single array are bad!)
Having said all this, companies like Sony/ATI/NVidia are easily staffed to deal with any extra design work techs like these incur.