I didn't find the notion of Samsung adjusting frequencies to match performance particularly strange, but I didn't think that such a thing would really be warranted. What I found strange was the notion of Samsung needing to set Cortex-A15 at 1.2GHz to match Krait at 1.9GHz exaggerated (and of course it has been demonstrated that they didn't do that). And still find that notion strange. But that ratio seems downright modest compared to what nVidia is saying and ams is supporting...
Now, does that mean I think that the Exynos S4s are held at 1.6GHz instead of 1.8GHz for this reason? I doubt it, simply because I think 4x1.8GHz pushes the allowable power consumption too high for a phone - way past killing your battery and into thermal limits. Samsung could have allowed higher clocks with only one or two cores active but they never did before so I don't think they'd start now unless the limitations were dire (like the original 1.2GHz claim)
Do you have any links to the performance data you're looking at? 10% would mean 30% better IPC (with perfect scaling, blah blah blah usual disclaimer), which sounds about right to me. First I heard about 1890MHz instead of 1900, too small to make a difference on the discussion but still kind of weird!
If you're interested, this the "2000 MHz" variant of the frequency / voltage table found in the HTC One's kernel source release.
static struct acpu_level tbl_PVS5_2000MHz[] __initdata = {
{ 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 875000 },
{ 1, { 486000, HFPLL, 2, 0x24 }, L2(5), 875000 },
{ 1, { 594000, HFPLL, 1, 0x16 }, L2(5), 875000 },
{ 1, { 702000, HFPLL, 1, 0x1A }, L2(5), 875000 },
{ 1, { 810000, HFPLL, 1, 0x1E }, L2(5), 887500 },
{ 1, { 918000, HFPLL, 1, 0x22 }, L2(5), 900000 },
{ 1, { 1026000, HFPLL, 1, 0x26 }, L2(5), 925000 },
{ 1, { 1134000, HFPLL, 1, 0x2A }, L2(15), 937500 },
{ 1, { 1242000, HFPLL, 1, 0x2E }, L2(15), 950000 },
{ 1, { 1350000, HFPLL, 1, 0x32 }, L2(15), 962500 },
{ 1, { 1458000, HFPLL, 1, 0x36 }, L2(15), 987500 },
{ 1, { 1566000, HFPLL, 1, 0x3A }, L2(15), 1012500 },
{ 1, { 1674000, HFPLL, 1, 0x3E }, L2(15), 1050000 },
{ 1, { 1782000, HFPLL, 1, 0x42 }, L2(15), 1087500 },
{ 1, { 1890000, HFPLL, 1, 0x46 }, L2(15), 1125000 },
{ 0, { 0 } }