NVIDIA Tegra Architecture

http://www.anandtech.com/show/7622/nvidia-tegra-k1

The SoC will come in two versions, one version with a quad-core (4+1) Cortex-A15,....

Much like Tegra 4, the A15 version of Tegra K1 features four Cortex A15s synthesized for high frequencies and a fifth Cortex A15 that’s optimized for low power/frequency operation.

http://developer.download.nvidia.co.../JetsonTK1_ModuleSpecification_PM375_V1.0.pdf

I can see an ARM A7 as a companion core in the one above.
 
I can see an ARM A7 as a companion core in the one above.

I see an ARM7, not a Cortex-A7. AFAIK all Tegras have had one. There's no way it'd be usable as a companion core. Either the companion core isn't listed or they dropped it entirely (unlikely since it's been detailed previously). Given that it appears to software to be more like an operating mode for a single core rather than a separate core I can see why they might not show it on a block diagram, especially since it'd be hard to differentiate it in such a small space.
 
EDIT: Too bad they only ship to North America :(

Pity - looks like a great bit of kit at a great price for any hobbyist. I definitely want one at least!

I guess it isn't too hard for most of the people in their target market to have it shipped on by a friend or redirection service but would be nice to do it direct.
 
Wow it's a Game Boy Advance CPU :)
Maybe it does some boring and important housekeeping like DRM, or is just for initialization, test, debug etc.
 
Wow it's a Game Boy Advance CPU :)
Maybe it does some boring and important housekeeping like DRM, or is just for initialization, test, debug etc.

It's actually pretty normal for an SoC to have one of these more embedded-class CPUs buried somewhere for some particular task, most of them just don't really advertise it. Like the old OMAP3s had an ARM9 and Exynos 5250 has a Cortex-A5.
 
Jl6I7La.jpg


Nvidia Tegra Erista announced.

Based on this graph, it appears that Tegra Logan (K1) in a high end smartphone will have ~ 200 GFLOPS throughput, and Tegra Erista (M1?) in a high end smartphone will have ~ 325 GFLOPS throughput.
 
By the way, NVIDIA had a slide for Tegra K1 that said "4x [improvement in] energy efficiency over A15 [Tegra 4 variant?]". If this is referring to the Denver CPU cores, that would be very impressive.
 
Is K1 even in mass production yet? :rolleyes:
Slide or not it wasn't too hard to guess that GMxxA GPU of the next Tegra will have 2 SMMs; the tricky bet is always the final frequency per given power envelope.
 
http://www.computerworld.com/s/arti...essor_but_delays_Volta_GPU_Parker_mobile_chip

Nvidia also introduced a mobile processor code-named Erista, which is due out next year. It will succeed the upcoming Tegra K1 chip and will be based on the Maxwell graphics processor. Erista's introduction has led to a change of plans for the release of a chip code-named Parker, which was on last year's road map and originally due to succeed the Tegra K1. The K1 chip will be in mobile devices later this year.

"Erista was moved ahead of Parker. We'll provide further updates later," Brown said.

TSMC's 16nm FinFET process probably is not ready for Parker and Nvidia didn't want to risk not having anything in 2015, hence Son of Logan SoC.
 
Is K1 even in mass production yet?

Mass production of TK1 has already started IIRC. Commercial availability is expected in the first half of 2014 (which means Q2). Note that the TK1 Jetson Dev kit starts shipping next month.

Slide or not it wasn't too hard to guess that GMxxA GPU of the next Tegra will have 2 SMMs; the tricky bet is always the final frequency per given power envelope

It is pretty clear that Erista will use two Maxwell SMM's (and a single SMM variant will not come into play). As for frequencies, I expect to see sustained GPU clock operating frequencies as follows:

Tegra Logan K1 (with one Kepler SMX)
951MHz in Shield
849MHz in a 10" tablet
521MHz in a 5" phone

Tegra Erista M1 (with two Maxwell SMM's)
1158MHz in Shield
1034MHz in a 10" tablet
635MHz in a 5" phone

Anyway, this is just a [slightly educated] guess, but we'll see how it goes. Note that Maxwell has ~ 35% more graphics performance per CUDA core compared to Kepler, so at these frequencies, Erista would have >2x improvement in graphics performance compared to Logan at the same power envelope. The crazy thing about all this is that, due to Maxwell's exceptional energy and area efficiency, it may even be possible to achieve these targets using 28nm HPM fabrication process. One way or another, I expect to see commercial availability of Erista by first half of 2015.
 
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Mass production of TK1 has already started IIRC. Commercial availability is expected in the first half of 2014 (which means Q2). Note that the TK1 Jetson Dev kit starts shipping next month.

Then I assume the spin it needed was successful since you're so self assured. Devkits are in no way any indication for any of it.

It is pretty clear that Erista will use two Maxwell SMM's (and a single SMM variant will not come into play). As for frequencies, I expect to see sustained GPU clock operating frequencies as follows:

Tegra Logan K1 (with one Kepler SMX)
951MHz in Shield
849MHz in a 10" tablet
521MHz in a 5" phone

Tegra Erista M1 (with two Maxwell SMM's)
1158MHz in Shield
1034MHz in a 10" tablet
635MHz in a 5" phone

Anyway, this is just a [slightly educated] guess, but we'll see how it goes. Note that Maxwell has ~ 35% more graphics performance per CUDA core compared to Kepler, so at these frequencies, Erista would have >2x improvement in graphics performance compared to Logan at the same power envelope. The crazy thing about all this is that, due to Maxwell's exceptional energy and area efficiency, it may even be possible to achieve these targets using 28nm HPM fabrication process. One way or another, I expect to see commercial availability of Erista by first half of 2015.

It's a quite optimistic guess given for the first immediate part above, given the reason for the actual spin necessity.
 
Then I assume the spin it needed was successful since you're so self assured. Devkits are in no way any indication for any of it.

1H14 commercial availability of TK1 was already confirmed by NVIDIA one or two months ago. As for the dev kit, this is not a limited edition nor expensive dev kit. This is a $192 kit that will be available at Newegg, Microcenter, NVIDIA.com, Zotac, Seco, Avionic design, Electro corporation (which in total covers USA, Canada, Europe, Japan): http://www.tomshardware.com/news/development-board-tegra-jetson-tk1-nvidia,26392.html

On a side note, even though Maxwell looks good so far at 28nm HPM, I would expect Erista to use something more advanced such as 20nm, with a 16nm FinFET SoC possibly pushed to 2H15 or 1H16.
 
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1H14 commercial availability of TK1 was already confirmed by NVIDIA one or two months ago. As for the dev kit, this is not a limited edition nor expensive dev kit. This is a $192 kit that will be available at Newegg, Microcenter, NVIDIA.com, Zotac, Seco, Avionic design, Electro corporation (which in total covers USA, Canada, Europe, Japan): http://www.tomshardware.com/news/development-board-tegra-jetson-tk1-nvidia,26392.html

You'd better wish that's not final hw in the devkit; I see no reason as others noted above for an actively cooled devkit to not clock at the full 951MHz.

On a side note, even though Maxwell looks good so far at 28nm HPM, I would expect Erista to use something more advanced such as 20nm, with a 16nm FinFET SoC possibly pushed to 2H15 or 1H16.

I'd assume that Erista replaces Parker; Parker was stated in former roadmaps for 16FF/TSMC. We'll fnd out eventually in due time if Erista is some sort of "mid life kicker" SoC or if it simply replaced Parker.
 
You'd better wish that's not final hw in the devkit; I see no reason as others noted above for an actively cooled devkit to not clock at the full 951MHz.
I already asked, but will ask again: was it confirmed that the Jetson TK1, as opposed to the Jetson Pro, is actively cooled?

1H14 commercial availability of TK1 was already confirmed by NVIDIA one or two months ago. As for the dev kit, this is not a limited edition nor expensive dev kit. This is a $192 kit that will be available at Newegg, Microcenter, NVIDIA.com, Zotac, Seco, Avionic design, Electro corporation (which in total covers USA, Canada, Europe, Japan): http://www.tomshardware.com/news/development-board-tegra-jetson-tk1-nvidia,26392.html
Nothing of what you say proves these boards are not using engineering samples of K1. I have already seen low priced dev kits running ES.
 
I already asked, but will ask again: was it confirmed that the Jetson TK1, as opposed to the Jetson Pro, is actively cooled?

Page 6 http://developer.download.nvidia.co.../JetsonTK1_ModuleSpecification_PM375_V1.0.pdf
http://developer.download.nvidia.co...02-7R375-0000-D00.Schematics.Rev.4.00_web.pdf

Heatsink/fan = 50*67mm
Coolermaster, Fansink, 2 Pushpins, 12V, 110mA

On another note: http://www.brightsideofnews.com/new...ynote---gtx-titan-z-and-pascal-announced.aspx

http://www.brightsideofnews.com/Dat...---GTX-Titan-Z-and-Pascal-Announced/GTC18.jpg


Nothing of what you say proves these boards are not using engineering samples of K1. I have already seen low priced dev kits running ES.
;)
 
You'd better wish that's not final hw in the devkit; I see no reason as others noted above for an actively cooled devkit to not clock at the full 951MHz.

I don't understand that logic. What would a developer gain from a 365 GFLOPS throughput variant as opposed to the 326 GFLOPS throughput variant in the Jetson TK1 kit? Since the Jetson TK1 kit is targeted for a variety of different development use cases, it makes sense to include active cooling for those who want to really push the hardware.

I'd assume that Erista replaces Parker; Parker was stated in former roadmaps for 16FF/TSMC. We'll fnd out eventually in due time if Erista is some sort of "mid life kicker" SoC or if it simply replaced Parker.

NVIDIA never said anything about Erista being a replacement for Parker, nor did they say anything about Erista using FinFET 3D transistors. The SoC formerly known as "Parker" seems to have been deconstructed (the Denver CPU goes to "Logan", the Maxwell GPU goes to "Erista", and the FinFET 3D transistors will probably go to whatever is next).
 
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