NVIDIA GF100 & Friends speculation

Guys I am not cherry picking anything.

Well OK maybe I am but I explained myself.

There is no point paying attention to results that have no meaning for each ones configuration. Someone that games at 2560X1600, please go ahead and don't pay attention to any of the other results.

As for this Unigine benchmark, I am pretty sure they are made at extreme tesselation setting. What chances are that we see games with this kind of tesselation for the next 12 months? Right. Next to none! Why should anyone base a future purchase on benchmarks that don't concern him?

That's why I prefer Tehcpowerup's and Computerbase's results, that average results per resolution.
 
DegustatoR said:
Cranking up tesselation factor is like the easiest thing on the planet one can do, you now?
Click to expand...

It's probably on the same level of ease as putting your fingers into the mains...perhaps vaguely more difficult since you actually do need to start some sort of IDE, or at least notepad, do some editing, re-compiling etc., whereas there are power sockets everywhere. Both actions are also similarly useful.
 
DegustatoR said:
Cranking up tesselation factor is like the easiest thing on the planet one can do, you now?
Click to expand...

Yes but at some point u cant find the difference even with a magnifying lense ;). Sometimes its even hard to find the difference with on and off :LOL:. (except unigine heaven)
 
Silus said:
Anyway, this s getting off-topic. If you want to discuss more of this, PM me or let's take it to another thread. Let's get back to GF100 speculation, which hopefully will end soon anyway :)
Click to expand...

Never mind, you clearly have your mind made up, lets just leave it at that shall we :p

Silus said:
http://www.fudzilla.com/content/view/18243/1/

GTS 450 = 256 SPs, 64 TMUs, 32 ROPs, 256 bit memory interface
GTS 430 = 192 SPs, 48 TMUs, 24 ROPs, 192 bit memory interface
Click to expand...

So according to this the specs are exactly what neliz was hinting at :D

Seems like its again divided into 4 GPC's with each GPC consisting of 64SP's, 16 TMU's,8 ROP's and one GPC disabled for the GTS 430?

psolord said:
Crap, I totally missed that! If the GTX 480 and the 5870 have 45W difference and since we know the 5870 idles at 27W then the GTX 480 idles at 72W?:oops:
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Whoa, yea if those are the idle numbers then it is 72W, toasty! Its quite clearly a big step back from GT200 if its true. Of course the Radeon 4870 with its 90W idle power takes the crown here :cool:
 
Erinyes said:
Never mind, you clearly have your mind made up, lets just leave it at that shall we :p
Click to expand...

Just like you :)

Erinyes said:
So according to this the specs are exactly what neliz was hinting at :D

Seems like its again divided into 4 GPC's with each GPC consisting of 64SP's, 16 TMU's,8 ROP's and one GPC disabled for the GTS 430?
Click to expand...

How exactly do you figure that GF104 has the 4 GPCs ??

If you are factoring the speculation by neliz, 128 TMUs are actually the total

This is a new chip and nothing will be disabled, but rather removed. It's exactly half of GF100 in terms of GPCs and SMs and that makes it 2 full GPCs, 8 SMs in total, each attached to 8 TMUs (4 re-enabled) and it has 32 ROPs, because it's using a 256 bit memory interface (two 64 bit controllers were removed, each connected to 8 ROPs).
 
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DegustatoR said:
You should take a look at DX11 SDK demos really and stop posting crap.
Click to expand...

I think what he means is that cranking up tesselation will give you squat in terms of quality, visual realism, etc. You need other stuff, like displacement mapping to make it matter... Hence, it's not the easiest thing on earth.
 
Silus said:
How exactly do you figure that GF104 has the 4 GPCs ??
Click to expand...
How exactly does anyone figure that there are such things like GPCs at all? I think it's purely PR. Nvidia has distributed setup/raster engines and they can tack an arbitrary amount of SMs to an arbitrary number of raster engines (as proven by GTX470 with 14 SMs and GTX480 with 15SMs and both having 4 raster engines). There is probably just some kind of simple crossbar or FIFO queue between the raster engines and the SMs.

Or how does the loadbalancing between the GPCs with a different amount of SMs (GTX470: 2 GPCs with 4 SMS and 2 GPCs with 3 SMs?) actually work? Most likely the warps formed by one rasterizer unit can end up in any of the enabled SMs and not only in a SM belonging to the same GPC as the rasterizer. That means, there are no real GPCs at all besides on some slides.
 
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DegustatoR said:
You should take a look at DX11 SDK demos really and stop posting crap.
Click to expand...
That you think it's so easy to add, with little consideration to anything else that's happening on the GPU at the same time, or your art and asset pipe, is testament to how much you should do more than go by SDK samples, so you understand how this stuff works in the real world on real hardware and in real games.

So you stop posting crap.
 
Silus said:
How exactly do you figure that GF104 has the 4 GPCs ??

If you are factoring the speculation by neliz, 128 TMUs are actually the total

This is a new chip and nothing will be disabled, but rather removed. It's exactly half of GF100 in terms of GPCs and SMs and that makes it 2 full GPCs, 8 SMs in total, each attached to 8 TMUs (4 re-enabled) and it has 32 ROPs, because it's using a 256 bit memory interface (two 64 bit controllers were removed, each connected to 8 ROPs).
Click to expand...

I was speculating... but since you clearly know exactly what the design of the chip is i'll take your word for it :rolleyes:
 
Gipsel said:
How exactly does anyone figure that there are such things like GPCs at all? I think it's purely PR. Nvidia has distributed setup/raster engines and they can tack an arbitrary amount of SMs to an arbitrary number of raster engines (as proven by GTX470 with 14 SMs and GTX480 with 15SMs and both having 4 raster engines). There is probably just some kind of simple crossbar or FIFO queue between the raster engines and the SMs.

Or how does the loadbalancing between the GPCs with a different amount of SMs (GTX470: 2 GPCs with 4 SMS and 2 GPCs with 3 SMs?) actually work? Most likely the warps formed by one rasterizer unit can end up in any of the enabled SMs and not only in a SM belonging to the same GPC as the rasterizer. That means, there are no real GPCs at all besides on some slides.
Click to expand...

That's what the scheduler is for. It must know where to send the info.

Also, I'll take the names given by the engineers that designed the chip, to the units in it, over your attempts at classifying them. Sorry about that :)
 
Silus said:
http://www.fudzilla.com/content/view/18243/1/

GTS 450 = 256 SPs, 64 TMUs, 32 ROPs, 256 bit memory interface
GTS 430 = 192 SPs, 48 TMUs, 24 ROPs, 192 bit memory interface
Click to expand...

Fairly interesting, though some things still don't quite add up to me:
256SPs likely implies 2 GPCs, hence only 16 pixels/clock rasterization rate (unless this was altered). Meaning 32 ROPs is a bit overkill.
Also twice the tmus - so maybe that was true afterall...
Also, the performance numbers don't quite add up - if the GTS 450 does "slightly" outperform 5830, then a 20% slower GTS440 won't in fact outperform a HD5770 but end up roughly equal since the difference between HD5770 and HD5830 is only ~15% on average. Meaning the GTS430 would more likely compete with the HD5750 instead.
 
Silus said:
Also, I'll take the names given by the engineers that designed the chip, to the units in it, over your attempts at classifying them.
Click to expand...
Bad thing is that architectural slides are known to bend the reality a bit from time to time. Besides that, do you think engineers draw such shiny and stylish graphs? ;)

Or to put it differently, what sense has the GPC designator at all if the schedulers have to possibility to assign the pixelshader work to a SM not belonging to the same GPC as the raster unit that have rasterized the triangles?
 
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MfA said:
That's not globally coherent though.
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Ok, so you tell me what you think "globallycoherent" does when all of the accesses to a UAV are unordered by definition? Why does it matter if you "flush the writes across the chip" if nothing else is guaranteed to be running at the same time and your groups can run in arbitrary order?

Jawed said:
I get a sense that 10.3a are sufficiently un-stable, for instance, that a few review sites will reject them for upcoming comparisons with GF100.
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I haven't experienced any stability issues myself, and they have provided some very sizable boosts to even complex DX11 algorithms. Impressive work I say!
 
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