So what are we saying, smaller than 500mm2?
By all accounts so far, larger than 550mm2.
So what are we saying, smaller than 500mm2?
I'd always gone with the outer ring being for power and ground plane(s), with the inner block for I/O, but with the gap still marking the chip edge. Throw out ~500mm/sq again then I guess, you both make good points.
On the chip itself I believe the centre is normally purely power/ground. The edges of the chip (where all the I/O lives) is also where the I/O pads are.I'd always gone with the outer ring being for power and ground plane(s), with the inner block for I/O, but with the gap still marking the chip edge.
GF100's ROPs/Memory looks like a bit of a kludge: more fillrate than rasterisation rate. Perhaps GF100 is 384-bit because NVidia was hedging its bets on bandwidth (time to market, chips available at time of launch)?IF 470 is somewhere between a 5850 and a 5870, then is this GF104 @330mm2 thing going to compete with Juniper @181mm2 (or 5830 for that matter)? Is the entire architecture fucked up?
If the 480 does not have 512 shaders NVIDIA needs to just wait until they get yields hire before launching.
GF100's ROPs/Memory looks like a bit of a kludge: more fillrate than rasterisation rate. Perhaps GF100 is 384-bit because NVidia was hedging its bets on bandwidth (time to market, chips available at time of launch)?
Look how close 8800GTS-512 is to 8800GTX. Sure the latter had some advantages.
How much die size can NVidia save simply by deleting 128-bit of memory interface + 16 ROPs/L2? 50mm²?
Faster GDDR5 chips would result in HD5870-like bandwidth, obviously.
NVidia could delete a GPC, or make them all 3 SMs. Either way, increase clocks. An entire GPC is ~60mm² I guess.
So, that's 110mm² in cuts (1 GPC, 16 ROPs, portion of L2), assuming GF100 is 480mm² that equals 370mm² for GF104
Jawed
GF100's ROPs/Memory looks like a bit of a kludge: more fillrate than rasterisation rate. Perhaps GF100 is 384-bit because NVidia was hedging its bets on bandwidth (time to market, chips available at time of launch)?
Look how close 8800GTS-512 is to 8800GTX. Sure the latter had some advantages.
How much die size can NVidia save simply by deleting 128-bit of memory interface + 16 ROPs/L2? 50mm²?
Faster GDDR5 chips would result in HD5870-like bandwidth, obviously.
NVidia could delete a GPC, or make them all 3 SMs. Either way, increase clocks. An entire GPC is ~60mm² I guess.
So, that's 110mm² in cuts (1 GPC, 16 ROPs, portion of L2), assuming GF100 is 480mm² that equals 370mm² for GF104
Jawed
The question is also what area could they save without the DP and ECC bloat which sits there for nothing. And maybe the absence of it could help increase the clocks too.
Were these already posted?
NVIDIA GeForce GTX 470 benchmarks surfaces | IT SHOW 2010 | VR-Zone | Gadgets | PC Enthusiasts
That's where I intended, or a bit faster.Yeah, but by all accounts, a 3GPC chip will be substantially faster than Juniper. I guess, it will fit the 5770-5850 hole.
It's a matter of trading tessellation/setup/rasterisation rates. Don't have a good feel for where the correct ratios lie. e.g. rasterisation:fillrate is "crooked" in GF100.My understanding is that putting 3 SMs/GPC will involve more work than is suggested by the gap between GF10x and GF100. Doing it makes the whole fermi modularity kinda redundant.
3DMark06.Although I don't remember the Vantage score.
At this point, frankly I am bored of seeing naked cards. I'd much rather see authentic clocks and/or benches.
3DMark06.