NVIDIA Fermi: Architecture discussion

[Dave Baumann]

I'm sure Cypress would take exception to the claim it is isn't fully compliant, if it can.

http://www.techreport.com/articles.x/17670/3

FMA improves precision by avoiding rounding between the multiply and add operations, while storing a much higher precision intermediate result. Fermi is like AMD's Cypress chip in this regard, and both claim compliance with the IEEE 754-2008 standard

 

[digitalwanderer]

Good enough for me, the card is real then.

 

[Eolirin]

If G92 vs R670/G200 vs R770 has taught us anything, it's not how expensive it is to make, it's how well it performs.

That's nonsense. If the G200 cost the same to make as the R770, nvidia would not have had to drop prices and reduce their margins just to remain competitive. The HD4870 wasn't the fastest card out there at launch. It was a good bit behind the GTX285. It was close enough that being 200 dollars cheaper made it worth it, but had it been priced in the same price point as the GTX285, it wouldn't have sold very well. AMD could make it cheaper because it was cheaper to make. That's why they "won" that cycle. Performance isn't the issue, price/performance is.

If you have to beggar your margins just to stay competitive, you better have enough money to outlast the competition because you'll be bleeding it on every unit you sell.

Edit: to be clear, it matters *to nVidia*.

 

[dnavas]

My interpretation is that Fermi is TMU- and ROP-less.

Yet there's a pic on the first page that clearly says ...

...err, Rys, didn't that used to say 16 bilerps? It seems to say 8 now.

Anyway, the thread starter indicates TMUs and ROPs. I'd be shocked if there weren't any. [Even more shocked than when I initially read 16 bilerps.] They haven't been covered in any kind of detail yet, because graphics just wasn't the target of this release.

If they have axed TMUs, then I think we definitely have a performance problem....

-Dave

 

[Rys]

Yes, I've scaled back my guess on the texture hardware (was about to post something). Jawed is just completely wrong about it being TMU and ROP-less, yes.

 

[3dilettante]

http://www.techreport.com/articles.x/17670/3

Has this been clarified since the earlier article?

http://www.techreport.com/articles.x/17618/5

The lone potential snag for full IEEE compliance, Demers told us, is the case of "a few numerical exceptions." The chip will report that such exceptions have occurred, but won't execute user code to handle them.

 

[digitalwanderer]

What hardware?

GF100, Fermi, the bloody new nVidia GPU.

Yes, I said it. It was really running on the GF100/Fermi/GT300.

 

[MfA]

3dilettante, which basically means a conditional branch after every DP op if you really really want them.

 

[Jawed]

Shared memory?

No, that's for attributes and barycentrics. It may be oversized for those, though...

Jawed

 

[Andrew Lauritzen]

No, that's for attributes and barycentrics. It may be oversized for those, though...

It's possible they do other stuff in there too... does anyone know if they implement indexable temporaries using shared memory for instance?

 

[nAo]

It's possible they do other stuff in there too... does anyone know if they implement indexable temporaries using shared memory for instance?

G80 shared mem size == max number of temporaries available in SM4

 

[Jawed]

GT200 cluster has 6 DP FLOP per clock:​

GF100 cluster (not to scale) has 32 DP FLOP per clock:​

Jawed​

 

[babcat]

Actually the way theyre going seems away from consoles, doesnt it? Less and less of this stuff is useful for consoles, as it moves away from graphics towards HPC.

What console wants a chip this big to maybe get equivalent graphics performance to 5870?

Then again I keep in mind that Nvidia has stressed theyre very interested in next gen consoles in interviews, so I dont know. Maybe theyd do a custom gfx oriented chip for a console, that would seem to be a lot more R&D though.

Out of all the console contenders MS is definitely sitting prettiest with ATI at the moment imo.

I think FERMI would be great for the PS4. Sony could use FERMI for physics, AI, and graphics and use an overclocked tiny CELL chip for backwards compatibility.

 

[MfA]

Why do they say that a SM has "8x the peak double precision floating point performance over GT200"? (Shouldn't that be 16.)

 

[ninelven]

Why do they say that a SM has 8x the peak double precision floating point performance over GT200? (Shouldn't that be 16.)

Maybe they meant TPC, which would indicate a shader clock of 2 GHz... or more likely just a mistake.

 

[ShaidarHaran]

Maybe they meant TPC, which would indicate a shader clock of 2 GHz... or more likely just a mistake.

Fermi doesn't have TPCs. Check David Kanter's write-up @ RealWorldTech.

 

[ninelven]

@ShaidarHaran ....sigh.... I was referring to them comparing 1 TPC from GT200 to 1 SM (if that is what you want to call it) of Fermi, sorry that went over your head.

 

[ShaidarHaran]

Maybe they meant TPC, which would indicate a shader clock of 2 GHz... or more likely just a mistake.

@ShaidarHaran ....sigh.... I was referring to them comparing 1 TPC from GT200 to 1 SM (if that is what you want to call it) of Fermi, sorry that went over your head.

Well **** you too

 

[ChrisRay]

Oh come on, regardless of how you work for them you can't be that blind when the proof is right there for everyone to see.

/sigh. If you read what I wrote. I said I dont know if thats the case. "I Dont know". Was exactly what I said. I havent even seen those pictures until now. FFS get a grip.

 

[nAo]

Someone needs to get a life.