NV30 not taped out yet....

[Pete]

pete, unfortunately, you don't just "Add" a 256bit bus. The external bus is such a crucial part of the chip, i'd wager its set in stone very early on in the desing process (As opposed to other stuff).

What, it's not a checkmark feature? Seriously, I thought that, just as the GF1 was quickly shifted from SDR to DDR, the chip itself can use all the bandwidth possible. The trace layout will be more intricate, but are you saying the higher-spec bus will simply not run at optimal efficiency because the NV30 wasn't made for it, or that the NV30 will have to be retooled to accomodate it?

In that case, are we looking at 128-bit memory with 3:1 compression? I'm confused, as an NV guy stated 256-bit is overkill (and TBR is not yet nec'y), yet we've had a few 256-bit rumors in the past week or two.

As fun as speculation can be (anticipation is the best part, especially in Parhelia's case), another six months of it would be unbearable. At least I'm learning a bit about chip and memory architecture.

 

[KimB]

Just adding the traces isn't enough. The chip has to actually be able to access enough data per clock for a 256-bit bus to be of any use.

For example, remember how the GeForce was called the "GeForce 256"? That was in direct reference to a 256-bit memory controller, which meant that it could roughly support memory that ran at twice the core clock.

A 256-bit memory bus today would require at least a 512-bit controller, since the memory clock speeds are most likely going to be at least double the core clock.

In other words, if the chip wasn't originally designed to make use of the bandwidth, it's not going to be able to.

As a side note, the ability of the GeForce to actually gain benefit from memory running at more than twice the core clock probably means that they had slightly more than a 256-bit controller...not sure, though.

 

[jvd]

Chalnoth: does that mean even if we increase the speed of the memory you wont see any big gains . Like say going from ddr to qdr. I'm assuming you wouldn't need a faster bus or anything but would you see an improvement going from say a geforce 4 with ddr and then moving over to qdr ram ? I hope i made sense of what i'm asking

 

[KimB]

Hopefully anybody who makes a chip capable of the faster memories will have the foresight to include a memory bus that is capable of the faster transfer speed.

Anyway, a classic example of a chipset that can't use its full potential is the nForce, which has the same performance whether using a 64-bit or 128-bit bus.

 

[mboeller]

"the rumor" says that the NV30 can do FSAA for free.
Maybe due to an compressed framebuffer and z-buffer ( same as with the R300 ).
So maybe the 48GB/sec are with FSAA enabled and counting in the "free FSAA" to inflate the bandwidth numbers. With an 4xcompressed framebuffer and 4xcompressed z-buffer when using FSAA the bandwidth could very well be inflated 3times from 16GB/sec to 48GB/sec (not really but for marketing ).

 

[Nagorak]

I really doubt it is "free". I'm sure there is at least a 5% performance hit.