New Technical Information About RSX???...But In Japanese

So the only point at which I'm not clear about whether buffers are used or whether it would be a write directly to memory, was in the discussion of the Cell-to-GDDR3 memory, where I wasn't sure (nor probably clear enough) about how Cell would communicate most efficiently with RSX and whether or not this impacted the Cell-to-GDDR3 bandwidth, or whether there are different channels for pipelining, say, textures to RSX without the Cell directly accessing the GDDR3 memory, and without the RSX copying these textures from XDR on its own being more efficient.
This is what it's wrong, it's not about buffers, it's about memory. You used figures related to write and read data to and from memory, not internal buffers:
- 4gb/s from Cell to RSX. This seems to me most useful for streaming in textures and vertex data. It would be more efficient to stream this in into the appropriate RSX buffers
The main advantage from cell being able to write at 4Gb/s to RSX would therefore seem to be if the above is indeed the case, i.e. the Cell can stream in data to the RSX into certain buffers that do not directly tax the GDDR3
in fact your step 0 is:
0. Cell pre-processes vertex data (animations, decompression, etc.) and textures (decompression or conversion to the compressed format that RSX likes, maybe generate textures from scratch, modify them to make them darker or add shadow, etc.) and sends them to RSX (Cell read from XDR, perhaps write to XDR, then write to RSX)
 
Reading comprehension FTW. That article said NOTHING about RSX having "more" shader power. It just said that devs are struggling to get shader performance out of Xenos but that should change as they get more familiar with the architecture. Revolutionary new shader technology says a big "Well durr!!!" to that idea.
I'm prety sure those 2 consoles are very powerful but it doesnt mean all you have to do is to stare at them and ask for an auto-made AAA game... There are more than million things that can degrade your perfomance...
 
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Ok, thank you for detailing this. Then I was wrong in the part where I already indicated I was very unsure. You see, I really have no idea about where and what kind of buffers come into play. All I know is that Barbarian wrote at some point that there are texture buffers in RSX and that they seem to have been increased to deal with latency from XDR memory.

My problem is that I really don't have any data (in my head anyway) on what kind of buffers exist on a chip like RSX and in the PS3 system in general related to graphics data processing. I was only trying to guess, based on the presence of the 4Gb/s Cell to GDDR3 memory bandwidth available, what the advantage would be of using this line over having the RSX read that same data from XDR memory on its own using the bandwidth available between RSX and XDR memory.

This is therefore also, as I already indicated, where my biggest questions are. When, in the pipeline, I said that in step 0 the Cell sends information to the RSX, I simply don't know whether certain buffers come into play like the ones Barbarian mentioned, or whether Cell writes this data to GDDR3 memory directly, or whether the buffers are even just special addresses in GDDR3 memory space - I really have no clue how this works.

I suppose I should read up on how N47 architecture works, as this could give me a better understanding of how the RSX's internal pipeline works and how feeding it data could be optimised. But I'm probably already trying to learn too much about this architecture for someone who isn't likely to be able to do anything useful with that knowledge in the near future. :( I'm just a really curious guy who likes to know more detail than is good for him, I guess. ;)

@inefficient: I don't think that's what Pinky is referring to. This is not about the Cell's access to GDDR3 memory. If you look at the chart, you will see that the Cell's read access to XDR memory is in fact slower than its write access. I assume that's what Pinky is wondering about.
 
This is therefore also, as I already indicated, where my biggest questions are. When, in the pipeline, I said that in step 0 the Cell sends information to the RSX, I simply don't know whether certain buffers come into play like the ones Barbarian mentioned, or whether Cell writes this data to GDDR3 memory directly, or whether the buffers are even just special addresses in GDDR3 memory space - I really have no clue how this works.
The general rule is: make it simple! so if in your scheme CELL has already wrote data to XDR memory there's really no need to read them again and write them again to GDDR3 when the GPU can read them (remember those slides? :) ) where they already are

Marco
 
The general rule is: make it simple! so if in your scheme CELL has already wrote data to XDR memory there's really no need to read them again and write them again to GDDR3 when the GPU can read them (remember those slides? :) ) where they already are

Marco

Well, this is not exactly as I had it in mind for step 0. When in that step the Cell writes to XDR memory, that is only because it needed to do multi-step changes to the data. Once the final data is output, that can be sent to Cell.

However, from the way you read it, I take it that the RSX will typically just take vertex and texture data generated or modified by Cell directly from XDR memory by itself, when it's ready to do so, and not have this pushed by Cell.

Really I was trying to figure out what the use is for the Cell's 4 Gbit access to the RSX's local GDDR3 memory, and this was the best I could come up with. If that's not typically what it is used for, however, then what *is* it used for? Is it used at all?
 
Um, it's meant to be a launch game is it not? I kind of doubt it's only 35% done if that's the case, it'd be pretty impossible to finish it in time. If it's REALLY only 35% done, it'll be a 2008 title for sure, and that might be optimistic considering how long they've been working on it! :p

Not a launch game anymore its been done till 2007 somewhere :cry:
 
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