Need some insight on pixel pipelines and instreuction/clock

[Leif]

Hi,

I have a little newbie question:

I possess a GeForce 5900 fx with a core clock of 400 MHz like the ones described here:
On that page I found the following:

"4 enhanced pipelined pixel processors. Each of them is equipped with two texture filtering units, two integer-valued floating-point ALUs and one simply floating-point ALU. It results to three floatong-point operations. Such configuration allows up to 12 pixel operations per clock. "

What I would like to know is:
What is the absolute maximum number of pixel shader instructions that this card can handle per second?
Is a pixel operation = an instruction in a fragment shader program?

Maybe it helps if I post the program:

# Get the color off a texture
TEXC R0, f[TEX0], TEX2, RECT;

# kill fragments with alpha = 0
KIL EQ.w;

# divide rgb by alpha
RCP R0.w, R0.w;
MUL o[COLR].xyz, R0, R0.w;

What is the maximum number my card can call this program per second?

thx in advance
Leif

 

[Xmas]

If you're very lucky, IIRC you get two bilinear texture fetches and two floating point vec4 operations per clock per pipeline on your card. But that depends on a lot of factors and only NVidia can give you a precise answer since the exact internals of pixel pipelines are a well-protected secret. They offer a tool that tells you what you want to know:

http://developer.nvidia.com/object/nvshaderperf_home.html

 

[Leif]

Thank you. Exactly what I was looking for!

 

[ERP]

forget it misread the shader