Well, if the patents are accurate, then it has a few nice tricks to reduce cache contention issues - special streaming load/store instructions, that can bypass the cache entirely for data that doesn't need to be cached, cache-locking for when you absolutely want a certain thread to have data cached, etc. As long as people take advantage of those capabillities, then cache thrashing shouldn't be too much of an issue.
Northwood was a very straightforward smt design, which did the bare minimum to support smt, with very little attention paid to how the multithreading would affect cache performance (it was also intel's first attempt at smt, i believe, so those issues are understandable). By all reports, the xenon cpu has had much more attention given to the multithreading aspects, and cache architecture (and ibm have a ton of experience dealing with multicore/smt cpus, with shared cache architectures, in fields where maximum performance is hugely important).