International Solid State Circuits Conference

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Fafalada said:
SPEAKING of which...
DM, I've got another interesting rumour for you. Apparently GS3 will have HUGE fillrate, but only when drawing Green pixels.

Wonderful news for the lovers of games based on the movie franchise "The Matrix".
 
Fafalada said:
SPEAKING of which...
DM, I've got another interesting rumour for you. Apparently GS3 will have HUGE fillrate, but only when drawing Green pixels.

That's why Sony will ship PS3s with two-colored eyeglasses that will provide a stereoscopic effect, just like those old movies. REAL 3D graphics! PS3 will kixx aas!
 
Fafalada said:
SPEAKING of which...
DM, I've got another interesting rumour for you. Apparently GS3 will have HUGE fillrate, but only when drawing Green pixels.

:LOL: Faf u r one funny guy....

Still, would play games based on the Matrix really fast then!!!! :LOL:


EDIT: Pana, we had the same idea! LOL
 
<laughs> Already this thread is great, simply for some wonderfully quotable lines. ;)

You are pulling stuff completely out of your ass to prove that a claim you pulled from the same orifice was right.

DM, I've got another interesting rumour for you. Apparently GS3 will have HUGE fillrate, but only when drawing Green pixels.
 
To be fair, the "Green pixel" GS joke wasn't my own invention (though as most PS2 developers I have my own share of similar topic joke material), but I think that in context of this thread it came off much funnier then original :p
 
I think we need to look at one more thing:

CELL@Winter 2009 = 1024 GFLOPS
CELL@Summer 2008 = 512 GFLOPS
CELL@Winter 2006 = 256 GFLOPS
CELL@Summer 2005 = 128 GFLOPS

Following his math in the same twisted way he has shown.

CELL@Winter 2004 = 64 GFLOPS
CELL@Summer 2003 = 32 GFLOPS
CELL@Winter 2002 = 16 GFLOPS
CELL@Summer 2001 = 8 GFLOPS

CELL@Winter 1999 = 4 GFLOPS
CELL@Summer 1998 = 2 GFLOPS

CELL@Winter 1996 = 1 GFLOPS
CELL@Summer 1995 = 0.5 GFLOPS




SCEI is just a bunch of babboons, CELL was already doing 500 MFLOPS in 1995 and they came out with a definately sub-par LSI 3000A with GTE attached to it at the last minute. :rolleyes:
 
...

Following his math in the same twisted way he has shown.
You suck in math. Do the recursion properly.

CELL@Winter 2003 = 64 GFLOPS
CELL@Summer 2002 = 32 GFLOPS
CELL@Winter 2000 = 16 GFLOPS
CELL@Summer 1999 = 8 GFLOPS
Notice how EE@spring 1999 was claiming 6.2 GFLOPS.. SCEI is not free from Moore's law like Kutaragi & Co would like you to believe....
 
Re: ...

Deadmeat said:
Following his math in the same twisted way he has shown.
You suck in math. Do the recursion properly.

CELL@Winter 2003 = 64 GFLOPS
CELL@Summer 2002 = 32 GFLOPS
CELL@Winter 2000 = 16 GFLOPS
CELL@Summer 1999 = 8 GFLOPS
Notice how EE@spring 1999 was claiming 6.2 GFLOPS.. SCEI is not free from Moore's law like Kutaragi & Co would like you to believe....

you missed 2004.

EDIT: If you are gonna use fuzzy math, then at least stick with your own line of reasoning.
 
Re: ...

Deadmeat said:
Following his math in the same twisted way he has shown.
You suck in math. Do the recursion properly.

CELL@Winter 2003 = 64 GFLOPS
CELL@Summer 2002 = 32 GFLOPS
CELL@Winter 2000 = 16 GFLOPS
CELL@Summer 1999 = 8 GFLOPS
Notice how EE@spring 1999 was claiming 6.2 GFLOPS.. SCEI is not free from Moore's law like Kutaragi & Co would like you to believe....

I do not suck in math... What a fuss for a simple mistake, I just used Winter 2004 and 64 GFLOPS, man what a nagging kind of guy you are: yes that was a mistake because it was not following the time-line pattern you were describing.

See, admitting your own mistakes does not hurt you.

Still, 6.2 GFLOPS/s in early 1999 with your prediction of 8 GFLOPS in late 1999 seems quite good to me.

Proceeding forward from this performance value ( the way you did in yoru estimate ) till a Q3-Q4 2006 launch date ( which we agreed that makes a 256 GFLOPS configuration possible even by your estimates ) would not be too fair as it excludes the helping hand of IBM and the fact that maybe both SCE and Toshiba gained valuable experience from designing the EE and developing CMOS4, CMOS5 and CMOS6 ( with again help from IBM in regards to manufacturing processes, materials and general know-how on the use of SOI ).

Especially SCE that was at its real first try with manufacturing of the GS and the EE ( done in the Oita #1 fab they co-own with Toshiba ).
 
Re: ...

Deadmeat said:
You suck in math. Do the recursion properly.

Wait, let me get this right. The "gentlemen" whose applying Moore's Law to an IC's FLOPs rating is going to lecture someone else on correctness?
 
Well this thread is getting locked.


I'm very sick of locking threads . If you can not post like adults and that goes for everyone in this thread. Do not post . Or i will start deleteing all posts made by you until dave bans you .

This goes for everyone . If you don't like what someone says prove they are wrong and then drop it. Do not bash the person or derail a thread to seem funny or because you do not like the person .
 
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