Jawed
Legend
I don't know how close to the hardware this presentation gets us:
Manually implemented stack for shader-call hierarchy looks like a pain in the arse. But that's Intel's problem and because of the complexity of ray-tracing's function hierarchy, this functional "Continuation-Passing Style" approach may be unavoidable. (I say this having read some AMD patents on the subject of the function hierarchy for ray-tracing.)
For example one of the parameters of a shader is the width of the SIMD. Since Intel builds a massive pipeline of callable shaders (this is referred to as a "mega-pipeline"), it can compile variants of the same source shader code with varying SIMD-width.
Intel's ray trace acceleration hardware does full traversal.
BVH building is hard, massive mess of functions...
Note: I know practically nothing about Vulkan, so lots of concepts here I can't distinguish as being Vulkan-specific or Intel-specific. Also, note, I'm assuming this is Xe.
Manually implemented stack for shader-call hierarchy looks like a pain in the arse. But that's Intel's problem and because of the complexity of ray-tracing's function hierarchy, this functional "Continuation-Passing Style" approach may be unavoidable. (I say this having read some AMD patents on the subject of the function hierarchy for ray-tracing.)
For example one of the parameters of a shader is the width of the SIMD. Since Intel builds a massive pipeline of callable shaders (this is referred to as a "mega-pipeline"), it can compile variants of the same source shader code with varying SIMD-width.
Intel's ray trace acceleration hardware does full traversal.
BVH building is hard, massive mess of functions...
Note: I know practically nothing about Vulkan, so lots of concepts here I can't distinguish as being Vulkan-specific or Intel-specific. Also, note, I'm assuming this is Xe.