Intel i9 7900x CPUs

I expect more PCIe lanes as consequence of AMD primary. We need more PCIe lanes for fast storages since high speed Nand will become more and more common. I would really see zen2 or ryzen refresh with double of the lanes we have now.
 
Hm, interesting, but I haven't heard of this.
There was quite a lot of talk at the time before/just after skylake's launch that the chip would feature AVX512, but probably would be/is disabled in consumer varieties of the CPU. I don't have any specific links tho, and maybe it was just speculation. It's my recollection of events in retrospect though. :)
 
I would really see zen2 or ryzen refresh with double of the lanes we have now.
Doesn't current zen chips have more PCIe lanes on-die than are enabled in single-chip versions, right? IIRC, desktop ryzen cannot support dual 16x PCIe adaptors.

IMO, all CPUs should have enough lanes for full-width connection to dual GPUs. :p
 
AVX512 there's supposedly a xeon skylake where it is enabled

I doubt it, please provide link. It much more likely that Intel postponed the validation of AVX512 , benefiting from the extra time till Skylake X. Or simply they planned on not shipping it in consumer skylake from the very begining.

It makes 0 sense to ship all those desktop & mobile SKUs with enhanced vector units (which cost area ) that are never going to work
 
I doubt it, please provide link.
Do I look like a walking link repository? :p It's just what I recall reading somewhere at some time, months and months ago. It could be that whatever news piece I read used skylake/xeon as a shorthand for the socket 2066 skylake x without specifying such.
 
There was a lot of confusion months and months ago wrt to AVX 512. At first, we were told to expect them with Skylake. At skylake launch , IIRC, it wasn't sure when they will reach any consumer - purchaseable processor, if at all.

I don't care about that particular news piece, but if there's a Xeon derivate of the first wave of skylake chips, already in the wild and that sports AVX 512, someone should know that by now.

The existance of that particular Xeon part would justify (rather poorly in my opinion, but still) the assumption that current desktop Skylakes actually have AVX 512 capable units. (what about Kaby Lakes? Coffe Lakes?). So it makes sense to look for that
 
Maybe it is this headline from february that stuck?
Google confirms that they are using Skylake Xeon CPUs which support AVX-512
https://www.overclock3d.net/news/cp...ing_skylake_xeon_cpus_which_support_avx-512/1

The text though is very clear that these are what would be known lateron as Skylake-SP:
„Google has confirmed that they are now using Intel's upcoming Skylake Xeon CPUs, which come with support for AVX-512 workloads for increased floating point performance.

Current generation Intel desktop and server CPUs only support AVX 256-bit workloads, with the only product to support AVX-512 to date being Intel's Knights Landing/Xeon Phi co-processor. “
 
Maybe it is this headline from february that stuck?
Perhaps! I honestly can't remember exactly what it was I read or where. I seem to recall it was a product launch announcement, or a re-packaging of thereof, but who the eff knows. Maybe a fake memory, I dunno. :D
 
Meaning they're affraid people will buy too many of these and then get angry at Intel for their release of the higher core count Coffes ?
 
Meaning they're affraid people will buy too many of these and then get angry at Intel for their release of the higher core count Coffes ?
Coffee is up to 6 cores. 7920X is 12 cores. Entirely different market segment. I would guess that they are either afraid of eating their Xeon sales or afraid that the existing 16-core Threadripper will beat their 200$ more expensive 12-core chip in benchmarks.

7920X has 400 MHz lower base clock speed than 7900X. It is not going to be perfect for consumer applications. My educated guess is that it loses to 7900X in lowly threaded consumer applications and loses to Threadripper in highly threaded professional workloads. But I am interested to see the margins of these losses. It might still end up being a good compromise for many people. But I fully understand that Intel doesn't want to show their current HEDT flagship as being a compromise. They have 16-core and 18-core models coming later this fall. Those are the chips they want media to be concentrating on, as they can simply instruct reviewers to run as many professional MP tasks as possible (which is obviously the correct way to benchmark a 16+ core CPU). Threadripper shouldn't be a problem for their 16-core and 18-core models.
 
VideoCardz has gathered some of the leaks that have appeared over the past few days regarding the 6-core Intel i7-8700K: the most interesting one comes from Karl Morin, a Canadian tech journalist who stumbled upon an HP Omen desktop PC running the upcoming CPU. The multi-threaded test suggests that it’s proportionately faster than the quad-core chips it succeeds, and is even faster than older 6-core HEDT chips thanks to higher clock speeds and a newer micro-architecture.
 
The tests are misleading though, done at default base clocks, Turbo was disabled. Ryan from PCPer had commented on that.


Highly unlikely that's at base clocks. 196 ST at 3.7 would mean 25% IPC increase from Kaby to Coffee...

It's more likely that the CPU was throttling due to BIOS OCP/thermal restrictions. Cinebench is no joke in terms of power draw.
 
Ok, new numbers, with turbo enabled (4.3GHz all cores), Cinebench MT score of 1402, which is Ryzen 1700 territory.

I guess forcing the highest turbo on all cores (4.7GHz) could yield a score of 1500, which is 1700X territory. Should be very easy, just enable the OS to adjust the CPU ratio from the BIOS, this will force the highest turbo on all cores without any hassles.
 
Is there some way to adjust so that instead of turboing all cores up to max clock you keep the pattern of turboing only some of the cores, except to higher frequencies than stock?

BCLK overclocking does this, maybe? I heard it works again on Intel CPUs now without fucking up the SATA/PCIe interfaces.

I suppose raising BCLK would up the CPU cores' base clock too, which is a bit low on the 79xx series.
 
Finally clear die shots of Skylake-X:


The SKX core is mostly a Skylake-S with side-strapped local L3 partition, extended set of FMA SIMD lanes, a large mesh controller and extra 786KB of L2. The last part explains the uneven access latency in the L2 region:

uGGrUqW.gif


Oh, and the doubled FP register file is visible too.
 
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