How much of a boost will SSE3 give Prescott?

[bbot]

I have been searching the internet and I can't find a flops figure for a 3.4GHz Prescott. Anyone have an idea?

 

[jvd]

No clue but this should be in hardware talk board. Now moving it

 

[pcchen]

PNI does not have instructions with more "flop" such as FMAs. All new instructions still do 4 or less "flop" (2 for double precision) per instruction. However, whether the implementation of Prescott have more "flop" per cycle is still unknown to public.

 

[Rugor]

Not much to start.

It's the classic problem of software support. It won't be a big deal until it has application support and no one will bother coding for it until there's enough of an install base. Wait a year to eighteen months after Prescott's release.

 

[Johnny Rotten]

Not sure but with Prescott kicking off in excess of 110 watts I think I'm going to be steering well clear... No more noisy computers for me. :?

 

[Bouncing Zabaglione Bros.]

Not sure but with Prescott kicking off in excess of 110 watts I think I'm going to be steering well clear... No more noisy computers for me. :?

There's some speculation that Prescott will herald the start of watercooling as standard in order to keep these chips running.

 

[horvendile]

There's some speculation that Prescott will herald the start of watercooling as standard in order to keep these chips running.

Not saying that it's necessarily incorrect, but I heard the exact same rumour when the P4 was about to debut.

 

[Saem]

A few IDFs back, Intel demoed some new coolling tech. Now it isn't new in any thing it does, rather it's new for what Intel stock cooling is. It's basically a fancier heatsink. I figure Intel has more R&D power for such things so they'll probably produce quite the heat sink now that they're forced to concentrate on it.

 

[megadrive0088]

Is Prescott likely to be the basis for the CPU used in XBox 2 ?

 

[Rage]

Is Prescott likely to be the basis for the CPU used in XBox 2 ?

If its a x86 CPU... perhaps. As has been shown with ATi, Microsoft are quite happy to jump between manufacturers, perhaps the xbox2 will have an AMD processor? Not enough info around at the moment.

 

[archie4oz]

PNI does not have instructions with more "flop" such as FMAs. All new instructions still do 4 or less "flop" (2 for double precision) per instruction. However, whether the implementation of Prescott have more "flop" per cycle is still unknown to public.

AFAIK the only thing I've heard is moving SSE execution off of the FPU to it's own execution resources (and possibly being able to execute packed instructions in a single cycle vs. a half register per cycle)

 

[Rugor]

Moving SSE off the FPU would be a big help since one of the P4's biggest weaknesses is the paucity of FP execution resources.

 

[archie4oz]

I don't think so... There's a ton of resources for the FPU. The biggest problem is that it constrains a packed operand to only operate on half a register which hampers throughput...

 

[Rugor]

I don't see the ton of resources, only 2 ops/clock, one of which must be a memory op, leaving one execution unit for all SSE, FP adds, and FP multiplies. That doesn't sound like a lot to me.

 

[MfA]

It is pretty standard to design the hardware so it can only be maxed out by 50:50 mixed multiplies and adds. Oh and Intel considers the standard FPU as a legacy, not something to be used in addition to SSE.

 

[Rugor]

I just compare P4 to either PIII or Athlon, and it has a weakness in FP execution units.

 

[pcchen]

The biggest problem with the SSE/SSE2 units in P4 is the throughput of scalar operations. Both vector and scalar operations are 2 cycles throughput. This makes using SSE/SSE2 for non-vectorizedl FP operations to be slower than x87 in some cases.

Although it looks like Intel was going to replace x87 with SSE/SSE2, but Intel introduces a new x87 instruction in PNI, so it may not be the case. The new instruction is, actually, an important one. Why it's not introduced earlier is beyond me.

I hope that Intel fixed the throughput of scalar SSE/SSE2 operations in Prescott. That will make using SSE2 for normal FP worthwhile.