Fusion die-shot - 2009 Analyst Day

Ethanatron - excellent guess. IBM was the one I'm thinking of.

Sun never made their own chips, and worked with TI....now TSMC.

David
 
Ethanatron - excellent guess. IBM was the one I'm thinking of.

Sun never made their own chips, and worked with TI....now TSMC.

Yes, I digged it up the hour after. I wonder what exactly drives the Sun-techs, principly.

Gee ... there was only really one choice to begin with.

We almost would have had a third player ...
 
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With the buyout from Oracle, Sun is pretty much a software solutions company. I'm not that confident that Oracle will continue with original parts developement for Sun. If you take a look at their product line, they've already retired/discontinued many workstations and servers since the buyout.

That pretty much leaves IBM, and possibly AMD (but AMD uses mostly IBM process tech, right?).

Regards,
SB
 
Frequency is determined by a lot of factors:

1. Depth of each pipeline stage
2. Process technology
3. Power consumption and thermal dissipation (hint: this was the constraint for NV)
4. Voltage, which impacts #3

It's hard to say that any one factor is most important. In fact, I'd argue that #2 in some ways is the most important. You can design a microarchitecture around process technology, but only two companies in the world can design process technology around a microarchitecture.

David
Yes. I simplified things.

But from the designers standpoint (without looking at the whole chip and assuming same processes) the length of the pipeline stages determine the clock speed.

I just wanted to point out that NVIDIAs ALUs are much more tuned for clock speed than ATIs.
 
TSMC lands CPU orders from AMD and VIA, says paper

http://www.digitimes.com/news/a20100615PB200.html

AMD's Ontario processors, which will be launched in the second half of 2011, and VIA's new dual-core Nano processors are both expected to adopt Taiwan Semiconductor Manufacturing Company's (TSMC's) 40nm process with orders to be placed in the first quarter of 2011, according to a Chinese-language Commercial Times report citing sources from equipment suppliers.
 
40 nm in 2H11. :oops: Ontario is pretty late, IMHO. Even GF should be ready with 28nm by then.

I hope that time frame is wrong. I was expecting Ontario products to be on the shelves by 1Q11 and not 2H11.
If that's the case I'm a bit disappointed.
 
40 nm in 2H11. :oops: Ontario is pretty late, IMHO. Even GF should be ready with 28nm by then.

Even GF? For what I've seen, GF is ahead of TSMC on 28nm? (The 28nm wafers shown some time ago with actual chips on them rather than sram or some such)
 
Dirk Meyer himself told some analysts a few weeks back (http://ir.amd.com/phoenix.zhtml?c=74093&p=irol-EventDetails&EventId=3076774), that Fusion will be shipping for revenue in Q4 2010. So either this time frame is wrong or Dirk meant Liano, not Ontario

But why wouldn't production start in late Q4? ... I think 40nm isn't that hard to manage after over a year. And Ontario is tiny! I am sure AMD can handle this very well :)

And "orders to be placed in the first quarter of 2011" doesn't mean that production will only start in Q1, right?

Dirk Meyer is more trustworthy than some "Chinese-language Commercial Times report citing sources from equipment suppliers" ;)
 
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With the buyout from Oracle, Sun is pretty much a software solutions company.

Well, we can consider the SPARCs software now, so you'd be right? :D (because the VHDL is open-"source")

That pretty much leaves IBM, and possibly AMD (but AMD uses mostly IBM process tech, right?).

It's not that AMD has to produce on IBM-facility.

He was indicating the ability to make the design dictate de process, if GF would have been subsidiary of AMD, they could have tried whatever they wanted (which then would have been only possible to Intel, IBM, AMD or backyard mad scientists).

I guess the only visible artifact of that relation is now that GF (apparently) can do T-RAM.

I believe IBM saw the chance to have much bigger (and cheaper) facility running IBM-specific processes, that's why they made the deal with AMD-GF. When GF was still fresh you were still able to form it, that was pretty much a unique chance.
 
Dirk Meyer himself told some analysts a few weeks back (http://ir.amd.com/phoenix.zhtml?c=74093&p=irol-EventDetails&EventId=3076774), that Fusion will be shipping for revenue in Q4 2010. So either this time frame is wrong or Dirk meant Liano, not Ontario

But why wouldn't production start in late Q4? ... I think 40nm isn't that hard to manage after over a year. And Ontario is tiny! I am sure AMD can handle this very well :)

And "orders to be placed in the first quarter of 2011" doesn't mean that production will only start in Q1, right?

Dirk Meyer is more trustworthy than some "Chinese-language Commercial Times report citing sources from equipment suppliers" ;)

I'm thinking it might be due to the volume they plan on seeing for Ontario.
OEMs will be buying as many as they can. I would assume this will be released in time for OEMs to get these into products/systems for the back to school timeframe.

No reason to go to 28nm on something that is already small, especially when they need high volume on a mature process.
 
MR2 posted the following at the 3DCenter.de forum:

source. http://www.xbitlabs.com/news/video/...ntinue_to_Exist_Even_After_Fusion_Launch.html

Early next year AMD plans to launch the code-named Llano accelerating processing unit (APU) with up to four Phenom II-class x86 cores and with up to ATI Radeon HD 5000-class 480 stream processors. Potentially, Llano offers higher computing performance than Redwood, which means that AMD will have to refresh entry-level lineup otherwise Llano will likely stop sales Cedar-based products.

also Tarkin posted the following:

source: http://www.xtremesystems.org/forums/showthread.php?t=253664

fusion_details.png


have fun
 
With 480sp I'd say its performance depends first on memory BW, unless it's clocked at some unusually low freq.
 
OK, let's scramble the well known R700 SIMD multiprocessor into a fused IGP part:

simd.png


The ALU "quads" are rotated, aligned and fit (surprisingly accurate) on the longer side of the TMU block, while the thread sequencer shall be just "fused" (no pun) into the new SIMD unit. The leftover parts are the other half of the R700's ALUs and the redundancy block.

Do I get a cookie? :D

Ok, I'm quite a bit late with this news but have an interesting question to ask.

How far removed from Fusion is the new Xbox Valhalla chip?

CGPU.jpg
 
How far removed from Fusion is the new Xbox Valhalla chip?

Before someone actually takes off the heatspreader, we can't know - but I wouldn't be surprised to see still 3 separate pieces of silicon, just now on the same flipchip package - and at minimum I'd bet there's 2 - MS shouldn't have the engineers to actually merge IBM CPU and ATI 2-die GPU into 1 die (unless they've hired IBM to do it, but would that be possible due ATI IP?)
So nothing close to Fusion
 
Before someone actually takes off the heatspreader, we can't know - but I wouldn't be surprised to see still 3 separate pieces of silicon, just now on the same flipchip package - and at minimum I'd bet there's 2 - MS shouldn't have the engineers to actually merge IBM CPU and ATI 2-die GPU into 1 die (unless they've hired IBM to do it, but would that be possible due ATI IP?)
So nothing close to Fusion

It wouldn't be all that surprising, AMD have worked closely with IBM in the past. But I'm still thinking as you that it's 2 or 3 chips, like Clarkdale. But certainly wouldn't be surprised if they somehow managed to get it on one chip.

Regards,
SB
 
Ethanatron - excellent guess. IBM was the one I'm thinking of.

Sun never made their own chips, and worked with TI....now TSMC.

David
Not entirely related to this topic, but what about Samsung? They make their own SoCs, such as the one used in the Samsung Wave and Galaxy S.

As for those sockets, I like socket FP1. It should allow for some pretty high performance, slim notebooks with reasonable battery life.

One more thing, what's all this talk about HT3 being on board? Why would they put that on their first fusion chip which is not intended for server/HPC use? Why wouldn't they go the same route as Intel took and only put PCIe links on the CPU? AMD's current southbridges connect through PCIe and all AMD needs along with a fusion APU is a southbridge. All the APU needs is a way to output its video signal, memory channels, PCIe links and a bunch of other things, but no Hyper Transport.
 
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