Alright, let's forget the rumours. What do you think of these?
GT212 | 288 SPs | 96 TMUs | 4 ROP blocks, 256-bit interface, GDDR5
GT214 | 144 SPs | 48 TMUs | 3 ROP blocks, 192-bit interface
GT216 | 72 SPs | 24 TMUs | 2 ROP blocks, 128-bit interface
I'm basing it on
- the ALU:TEX ratio being carried over from G200, as it was carried over from G8x to G9x
- TMU count still being higher compared to G92/G94/G96, even though not two times higher
- GT214 and GT216 could produce similar performance as G92 and G94
I'm not sure about
The bandwidth needs of such chips, the viability of proposed interface widths on 40nm, and DDR3/GDDR3/GDDR5 prices compared to the cost of adding a wider interface.
The initial 40nm line-up would include only GT214, GT216 and perhaps GT218 - these would obsolete G92, G94, G96 and G98. G200b would stay for some time, to be later obsoleted by GT212. GT212 would be launched when the 40nm process is mature enough so it makes sense instead of 55nm for G200b.
What I don't like about my speculative roadmap is the gap between GT214 and GT212. Maybe GT212 could be toned down a bit, or GT214 toned up - probably based on what die size will nVidia need to put the pads on for their chosen bus width. And there used to be an even greater gap between G80 and G84...
Now about GT218. You're right that the basic building block is 8 TMUs + 16 SPs on G8x/G9x and 24 SPs on G200. I wonder, though… several sources claim the Quadro NVS 420 to have two times 8 SPs - is that possible or is it a mistake?
Anyway, GT218 would be more of a video decoding GPU than a low-cost gaming GPU, so it could very well have just one SIMD:
GT218 | 24 SPs | 8 TMUs | ???
The problem is, I'm not sure whether the chip could support a 64-bit interface. 32-bit with GDDR5 would probably create sufficient bandwidth, but nobody will stick expensive GDDR5 onto a $50 card and 32-bit bus sounds very unlikely. It would only make sense if GDDR5 was the standard choice for GT21x cards and nVidia designed the ROP/MC blocks with 32-bit channels (along with something similar to ATI's ring-bus or hub, so the crossbar doesn't get huge), to offset GDDR5's slower command rate. But something tells me that won't be the case and the majority of the cards will use GDDR3, those will be exchanged for DDR3 as time goes, and GDDR5 will be used only where really needed.