I suspect it roughly is (remember G98, for example, isn't quite exactly 1/2th G96 either), but more in terms of bus width than the number of SPs this time around; i.e. 192-bit GDDR3->384-bit GDDR3->384-bit GDDR5 for example... Of course, roadmaps can change and what was very simple and seemingly elegant on a piece of paper can turn out quite differently in the end.
Those bus widths sound quite plausible, except for one thing: there was only one chip in history with an unconventionally wide bus, that being G80. Other than that, all chips had 128, 256 or 512 bits, although for G92 a wider interface would have made sense.
Another argument in favour of GT216 having 32 TMUs is that both G84 and G96 had 16 TMUs; therefore if they sticked to the same kind of nomenclature, you'd expect GT216 to be more similar to G94 - which certainly had 32 TMUs, didn't it?
Not necessarily. I think that number will depend on whether nVidia keeps the 3:1 physical ALU:TEX ratio from G200, or goes for 4:1 as you suggested with the 128 SPs, 32 TMUs educated guess. So what if TMUs are not the reference point? Maybe SPs aren't either.
So GT216 could end up having 24 TMUs (it's still an increase) 72-96 SPs. Not an asphalt grinder in Q3'09, but it's value chip anyway.
Then GT218 could have exactly half these specs (36-48 SPs, 12 TMUs, 64-bit bus) and GT214 double them, like 144-192 SPs, 48 TMUs, 192 or 256-bit bus.
I don't know whether such specs are possible for those interface widths, but the 384 SPs/96 TMUs rumour has been around for some time concerning GT212.
And don't think I don't hate having to guess from codenames and package sizes, but it seems we've hit a drought this season, so I'm quite happy even for the Fudzilla info.
