Details on the new Toshiba fab in Oita

[Panajev2001a]

Yes, this is the fab SCEI is investing with Toshiba and that is going to mass-produce Cell chips ( as well as other chips ) using 65 nm technology...

http://www.toshiba.co.jp/about/press/2003_04/pr2101.htm

The new Oita fab will produce cutting-edge system LSIs, mainly microprocessors for broadband network applications. It will employ Toshiba’s embedded DRAM process technology and 65-nanometer process technology, and will transition to 45nm process in the future. By using advantages inherent in its world-leading embedded DRAM process technology, Toshiba is determined to remain a driving force in technological innovation and to provide customers with excellent products for broadband networks, including digital consumer products and mobile equipment.

Toshiba is now working with Sony Computer Entertainment Inc. (SCEI) on joint implementation of production facilities for the manufacture of SCEI’s products in Oita’s new clean room. The two companies will confirm details in due course, including the amount and timing of SCEI’s investment.

New Facility

Building Structure Two-floor, steel-framed building
Building ground area 24,100m2
Floor area 48,800m2
Clean room area 15,700m2
Start of construction June 2003
Completion January 2004
Start of mass production in the latter half of first half of FY2004 (planned)

 

[Paul]

I guess that's it then. Any doubts anyone had in Pana about this in the past are moot now, the production will start early 2004!

Looks like that whole "ps3 in 2007" BS is wrong.

 

[megadrive0088]

never doubt Panajev

 

[Paul]

A Few people did

 

[Panajev2001a]

I am just glad that this Press Release does specify the completion date for the completion of the fab and puts it in black over white

Then we have other press releases stating that SCEI will use its new 65 nm and 300 mm wafer ( soon to be upgraded to 45 nm ) manufacturing lines for Cell and other LSIs and that Cell would be used for their next generation Computer Entertainment System...

April 21, 2003
Sony Computer Entertainment Inc.
Sony Corporation
Sony Computer Entertainment and Sony Invest 200 Billion Yen
Over Three Years in Semiconductor Fabrication
Installation of fabrication line supporting 65 nanometer process technology
TOKYO, JAPAN, April 21, 2003 – Sony Computer Entertainment Inc. (SCEI) and Sony
Corporation (Sony) announced today that they would invest a total of approximately 200 billion
yen over three fiscal years from 2003 to 2005 in the installation of a semiconductor fabrication
line to build chips with 65 nanometer process on 300 mm wafers.
With this investment, SCEI will manufacture the new microprocessor for the broadband era,
code-named “Cellâ€￾, as well as other system LSIs, to be used for the next generation computer
entertainment system. This investment serves an important role not only for SCEI but also for
the Sony Group to develop future broadband network businesses.
Of the 200 billion yen, 73 billion yen will be invested in the FY2003. Installment of a new
semiconductor fabrication line for building chips with 65 nanometer process on 300mm wafers
will be initiated in SCEI’s Fab2, a semiconductor fabrication facility located in Isahaya City,
Nagasaki Prefecture. Test production will begin using the new fabrication line, gradually
moving on to mass production. Execution of the entire investment will be determined by taking
optimal timing, place and allocation into consideration.
Since the spring of 2001, SCEI has been engaged, together with IBM Corporation (IBM) and
Toshiba Corporation (Toshiba), in the development of the new microprocessor for the broadband
era. Also, since the spring of 2002, Sony has participated in the said three company alliance for
the development of the advanced semiconductor process technologies. Research and
development of digital signal processing technologies for broadband applications are also being
conducted.
By means of this investment, SCEI and Sony aim to effectively conduct test production, and to
quickly establish a mass production system with 65 nanometer embedded DRAM process.

We have already seen this one though

 

[Paul]

So what can we conclude from all this, for starters.

Cell will indeed be ready for 2005 debut, contrary to rumours.

Cell will be in PS3

So what's left..

I think we (beyond3d console forum) should debate and come up with our own estimated specs for ps3, and then compare them to the real ones to be revealed in 2004.

 

[vers]

CELL come

intel,M$ go to the HELL

 

[jvd]

so construction will be done jaunary of 2004 if no mishaps acure . planed mass production is second half 2004. So that normaly means end of the year. So prob around sept october we will see mass production out of it .

 

[zurich]

Has there been any news/information on the raster/graphics chip thus far? Name? Process? Transistor count?

 

[jvd]

Has there been any news/information on the raster/graphics chip thus far? Name? Process? Transistor count?

i dunno mabye the cell chip will do everything . I can't imagine this chip being cheap to make esp at the begining. So who knows they just might use the 1 tflop monster for everything or have a suped up gs thrown in there ? they could double the speed of the gs and keep the ee on the same die and keep backwards capabilyts with it .

 

[Paul]

planed mass production is second half 2004

Start of mass production in the latter half of first half of FY2004 (planned)

 

[megadrive0088]

i dunno mabye the cell chip will do everything . I can't imagine this chip being cheap to make esp at the begining. So who knows they just might use the 1 tflop monster for everything or have a suped up gs thrown in there ? they could double the speed of the gs and keep the ee on the same die and keep backwards capabilyts with it .

absolutely not. the Cell CPU won't do everything. the other major chip is the GPU which will contain the rasterizer. this is Graphics Synth 3 aka Visualizer.

Actually the graphics chip is what I was going to say is next on the list to find out about, now that it has been confirmed again that Cell will be in PS3 (which I never doubted)


if Cell were to do everything, the PS3 would not be much of an improvement over PS2. (in the double digits not 1000x or even 100x)
consoles always, always have dedicated graphics chips, with the exception of the VMLabs developed Nuon (ProjectX) which was a complete failure anyway. the CPU should not be made responsible for the repetitive graphics tasks that dedicated graphics chips do. otherwise its a waste. that said, the GPU of PS3 is likely to be based on the Cell principal. in fact, the front end of the GPU, meaning the T&L/VS portion, is going to look very much like a cut down Cell, with PEs that contain PUs (cutdown CPU cores) and APUs (floating point+integer auxillery processors) - the rasterizing part of PS3's GPU, will likely be similar to the PS2's GS. it will have Pixel Engines and Image Caches. this is where the texture and filtering and AA get done, that if done on the Cell CPU, would bog the machine down horribly, probably causing programmer conflicts over processing resources and all kinds of other headaches i cannot even begin to imagine.

 

[Panajev2001a]

jvd, yes the Cell chips will be expensives... Sony will take some loss on each PlayStation 3 sold, but look at this line in the press release...

65-nanometer process technology, and will transition to 45nm process in the future

translation: 65 nm seems to be a transition process... 45 nm will come as soon as possible and will cut the costs significantly.

65 nm to 45 nm is not a small jump and their fabs are set-up in such a way that this transition will be as smooth as they can.

I think they could go with a Visualizer kind of GPU ( Cell based ) or with a super super-GS with more more programmability and features and go with the full micro-polygon based approach...

Still I think that the Visualizer ultimately would save them money as it would be easier to debug than a completely unrelated super-GS as the Visualizer uses the same building blocks as the Broadband Engine chip ( it uses Cell architecture ) and the really big difference between the two chips is that in the place of 4 APUs in each PE we have 1 Pixel Engine, Image Cache and 1 CRTC ( andunified CRTC at the end, connecting all four PEs... well this seems it could work also like the GScube, separate CRTC and a merger/final CRTC )...

Also they say "mass production" starting in the "latter half of first half of FY2004"...

This could mean August as beginning of mass-production, but it is not like that no useful chips will be produced before ( the fab should start early production before the beginning of mass production ).

Also, I do not see PlayStation 3 launching before April-September 2005 in Japan and December 2005 in North America and they won't be using only one fab to manufacture those chips...

The new Nagasaki fab and the other fabs ( upgraded ) should be able to help too.

 

[Panajev2001a]

planed mass production is second half 2004

Start of mass production in the latter half of first half of FY2004 (planned)

That is the Fiscal Year 2004... doesn't the Fiscal Year begins in February/March ?

 

[overclocked]

Its impressive, is Sony and Co "before" AMD % Intel etc by much/ or at all with this?

How big(many transistors) can we expect this chipset to have?
And if they are going for 64megabyte edram how big area will it take compared to the GS in PS2?

 

[Paul]

It's a confusing quote, makes you think twice.

I Think when they mean "years" they really mean fiscal years, and if im not mistaken that begins in march.

The later half of first half, well.. when is the first half?

 

[megadrive0088]

Panajev this super super-GS is something I have not heard mentioned before. is this something actually under concideration/rumored, or something you thought of as a possibility?

I take it a super super-GS would not be Cell based, and might not have T&L onboard. would be a very upgraded GS with more pixel pipelines than PS2 GS (unlike Visualizer) and obviously more features...
(perhaps with T&L afterall since you mentione programmablity)

to me that is almost more interesting than Visualizer, as the rasterizing portion of Visualizer has to compete for transistors with the Cell-like front end (the T&L/VS like part with PEs/APUs) where as a super super-GS would be more of a pure rasterizer i take it with more pixel pipelines.... say 32-128 pipes, which would be a 4-16x increase in pipes and thus fillrate (clock for clock) over PS2's GS.

or no?


I still think ultimately the Visualizer will be the way Sony goes.

 

[Brimstone]

I will be highly impressed if Sony pulls this off and doesn't lose its dominate position in the console market.

 

[vers]

on 0.65 micron about 300millions transistors

32MB eDRAM is 250 millions transistors

 

[Panajev2001a]

I look at the current GS... if it had more programmable shading and better texture filtering ( single layer texturing ) it would be quite THE chip ( with opportune upgrades to e-DRAM and clock-speed )...

How many GPUs havbe you heard that they perform better and better with smaller triangle sizes ?

The architecture was designed to draws small polygons very fast and that would be very good if you wanted to use a Reyes-like micro-polygon based approach ( micro-polygons = flat shaded, single textured sub-pixel polygons ).

This super-GS ( edit: sorry Vince for the terminology ) would not have T&L on chip.

I do not think that a super-GS is in production... maybe its rendering core is: after-all the Visualizer has dedicated silicon for certain 3D rendering functions like texture filtering [edited ] ( Pixel Engines, Image Caches and CRTCs )...

The Visualizer is a specialized Cell chip with GPU like functionality... this makes more sense than a big and non Cell based GS.

Programmability would be already there as we would have 4 APUs per PE thus 4 APUs per pixel pipeline basically ( 4 pixel pipelines at a good 1-2 GHz [prolly 1 GHz] is nto a bad thing considering that even HDTV [720p] doesn't require that MUCH fill-rate and that the speed of the programmable execution units [ops/clock] is becoming more important than raw fill-rate... which would still be 4 GPixels/s and 4 GTexels/s )... e-DRAM is already there...

Debugging both Broadband Engine and Visualizer as far as silicon goes would be easier than debugging the Broadband Engine and a separate and big super-GS.