CELLular poll

The CELL project, in its many incarnations, will overall succeed

  • No

    Votes: 0 0.0%
  • Skeptical, wait and see

    Votes: 0 0.0%

  • Total voters
    167
This poll is typically chappy in its character.

Where's the I don't know/let's wait and see option huh?

The only somewhat neutral option is the negatively biased 'sceptical' alternative which means I can't vote at all.

EDIT: Sorry, didn't see Chap was NOT the author of this topic...


*G*
 
Grall said:
This poll is typically chappy in its character.

Where's the I don't know/let's wait and see option huh?

The only somewhat neutral option is the negatively biased 'sceptical' alternative which means I can't vote at all.

EDIT: Sorry, didn't see Chap was NOT the author of this topic...


*G*




:LOL: :LOL:
 
This question is too ill defined to be interesting IMO. What constitutes success? Living up to speculation? Impossible ...

How about a poll guessing at the number of FLOPS for the PS3 CPU? Im still voting for 200G.
 
MfA said:
This question is too ill defined to be interesting IMO. What constitutes success? Living up to speculation? Impossible ...

How about a poll guessing at the number of FLOPS for the PS3 CPU? Im still voting for 200G.


200Gflops?? sounds low, considering we have gpu's today pushing that amount
 
london-boy said:
MfA said:
This question is too ill defined to be interesting IMO. What constitutes success? Living up to speculation? Impossible ...

How about a poll guessing at the number of FLOPS for the PS3 CPU? Im still voting for 200G.


200Gflops?? sounds low, considering we have gpu's today pushing that amount

I take it he wasn't refering to "Nvidia FLOPS"... :rolleyes:
 
As far as the programmable parts go (the shaders) their performance is in the tens of GFLOPS range.
 
Grall said:
This poll is typically chappy in its character.

Where's the I don't know/let's wait and see option huh?

The only somewhat neutral option is the negatively biased 'sceptical' alternative which means I can't vote at all.

EDIT: Sorry, didn't see Chap was NOT the author of this topic...


*G*

Getting worked up about the semantic differences between 'Skeptical/Lets wait and see' and 'I don't know/Lets wait and see'? Jesus, someone is a miserable human being.
 
How about a poll guessing at the number of FLOPS for the PS3 CPU? Im still voting for 200G.
That would be a very safe and modest assumption.

200G would be if Moore's law progression is applied to PS2's 6.4G.

6.4 x 32 (5 years) = 204.8G

I think they are aiming higher than simple Moore's law (as they've actually even went on record saying).
 
Moore's law says little about performance, and the doubling per year stopped holding up 3 decades ago.
 
Moore's law says little about performance, and the doubling per year stopped holding up 3 decades ago.
That's interesting. Can you give me some examples of not holding up? I'm personally tired of that 'law' myself, but it seemed to me like it's always holding up (more or less) even to this day.

What are you basing your 200G assumptions on, then?
 
He recalibrated it in the seventies to a doubling every 2 years.

As for what my guess is based on, (.18/.065)^3 * 6.2 rounded up to the nearest hundred (which rounds up quite far).
 
Your assumption seems flawed Mfa ( I am not trying to be rude or a know-it-all guy as I do not believe to be sucha guy ) IMHO, as I do not see all things taken care of...

The thing I am thinking at the most is clock speed difference ( you put 180 versus 65 nm )... 65 nm might be pushed faster than the process the EE used as I do not think that a <14 MTransistors CPU on a 180 nm process should have maxed at 300 MHz even considering the initial die area.

Another thing is that I do not think that the PlayStation 3 CPU could not take more die area than the 180 nm EE took, after all they are going for 300 mm wafers and I am not saying double the area, but I am saying that the area of the CPU could be greater and pack more execution units than what you would be thinking about.

Plus the case might be that 1 TFLOPS is obtained combining also the FLOPS that the Cell based Visualizer ( PlayStation 3 might use two Cell chips: one would be the CPU or Broadband Engine [or something similar to it] and the other would be the GPU or Visualizer [or something similar to it] ) provides which would count as Apulets can be processed in either CPU or GPU as they would be both Cell based...
 
The whole idea and where they want to go with it will fail. However, I doubt that a few products with the structure won't succeed (their use of Cell won't live up to the original visions though.. they'll just be self-contained).
 
300 mm wafers only were a temporary correction of the trend of increasing cost per area, wether cost per area increased or decreased by the time Sony starts making these processors is entirely up in the air. As is wether they are willing to loose the same amount of money per unit initially.

Power consumption per area doesnt stay constant if you scale the clock directly with decreasing feature size ... I ignored that and did just scale the clock (which explains the ^3). Wether architectural improvements (both inside and outside the processor) allow them to push it even more agressively than that again is entirely up in the air.

I simply dont care about the GPU, I was precise enough in indicating to which part of the console my guess applied.
 
(their use of Cell won't live up to the original visions though.. they'll just be self-contained

I agree with you on the fact that we will not see thousands of PS3's linking up over the net to form a "broadband network". Cell linking up over the net is something that could verywell happen for servers though.

What we will see though is an incredibly powerfull processor for PS3 and many of Sony's products using Cell technology instead of other companies chips.

I wouldn't say the whole aspect will fail, but I know their broad ps3 visions with the processor ultimately will.
 
MfA said:
As for what my guess is based on, (.18/.065)^3 * 6.2 rounded up to the nearest hundred (which rounds up quite far).

I used to base my thinking on scaling the Emotion Engine aswell and could never phantom where Kutaragi and Okamoto were getting their preformance numbers from. It was actually Obi-Wan Ben who made me look elsewhere with some points he made (PS. Is Ben alive? Wonder where he's gone :)). I'm surprised you're doing such simplistic number crunching, being who you are and all.


A single VU is 5.8M Transistors according to the SCE/Toshiba paper entittled, Vector Unit Architecture for Emotional Synthesis. It outputs 2.4GFlops according to the same paper at 300mhz.

Cell speculation has an APU outputting 32GFlops (13.33X) at 4,000mhz (13.33X). Double check my math as I'm doing this on the fly so this could be wrong, but the floating-point preformance delta is absorbed completely threw clock increase which I'll discuss later.

EDIT: Sorry about the mistake, I cought on as I was getting in my car and I'm a psycho when it comes to me stating false things. Of course it'll [APU] scale linearly with the VU as they both have 4 FPUs with a 4 way vectorized multiply-accumulate instruction to be considered 8 FLOPs.

Basically since Cell is so modular and symmetric as per the patent we can express the transistor count as:

[APUtransistors * 8] + PUtransistor = PEaggregate transistor

Thus, if we do some rough conjecture and state that each APU is double the VU's size and thus 10M transistors. We find that:

80M + 20M = 100MT

A Broadband Engine had four PE's, so that's a total of 400M logic tranistsors based on extrapolation from the Emotion Engine. Which, when you realize that Intel will take the >100MTranistor Tejas to 9.2Ghz on their 90nm, non-SOI process, then this starts looking entirely possible concidering it's a more custom IC that can sustain the same yeilds that the Emotion Engine did by pushing the lithography hard. NOTE: All data seems to indicate they'll be pushing the 65nm process hard, not 90nm.

But, yet, again the problem that I'm hesitent on isn't logic but the eDRAM and the chips size and thermal output. I just recently read an article that started off with something vaguely like, 'People allways email me asking what the logic gate count is for SoC's and it pisses me the hell off. In an SoC the logic is insignificant enleu of the onboard memory hierarchy and it's effect on size.'

What I'm also curious about is how effecient their logic is in Cell as opposed to that in the EE's VU.
 
I'm also surprised Marco that you're sticking with your initial bet considering you anticipated that number based on what the online-tabloid media (eg. The Inquirer) projected the PS3 would use due to that one press-release, IBM's now-defunct 0.10um SOI.

But, I still worshop you. ;) heh. Where's that icon of the guy bowing when you need it?
 
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