I agree 10 is definitely our best guess, but I wouldn't use the word "clearly"
Baseless Next Generation Rumors with no Technical Merits [post E3 2019, pre GDC 2020] [XBSX, PS5]
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I agree 10 is definitely our best guess, but I wouldn't use the word "clearly"
Exactly, people should stop talking like we know these things for a fact when it's an extrapolation from an incomplete view.
I agree 10 is definitely our best guess, but I wouldn't use the word "clearly"
It's clearly symmetrical, but I don't think I can call 10 chips. There might be 2 extra in the far corners that are blurred.
Looking at it until my eyes bleed, the farthest blurry chip does look aligned with the left side, so yeah, symmetrical.
Is there any angle eliminating the possibility of 4+4+4?
No. Distant side is too blurry.
-2.
Guessing, 1GB or 2GB per chip so, 10GB or 20GB? If this means anything at all which seems doubtful. EG, incomplete early motherboard etc.
Xbox One X already has 12GB so it seems odd they'd go less. OTOH 20 seems like too much for a mainstream product. OTO, O, H, I just bought a smartphone with 12GB RAM
. Anyways all just fanciful speculating at this point.After X1X Microsoft was like "we aint making counting our memory chips so easy this time suckas!"
The chips are 14gbps, so...
10 chip:
560GB/s
10GB or 15GB or 20GB depending on the capacity used
12 chips:
672GB/s
12GB or 18GB or 24GB depending on the capacity used
(15 and 18 capacities are dependent on the 1.5GB chips that are in the gddr6 standard docs but might not exist)
D
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Microsoft need to be more than flexible, they need to be willing to potentially lose money to achieve some fanboy dream.
My sources say they all came from a bitter Ken Kutaragi.
Guessing, 1GB or 2GB per chip so, 10GB or 20GB? If this means anything at all which seems doubtful. EG, incomplete early motherboard etc.
Xbox One X already has 12GB so it seems odd they'd go less. OTOH 20 seems like too much for a mainstream product. OTO, O, H, I just bought a smartphone with 12GB RAM
After X1X Microsoft was like "we aint making counting our memory chips so easy this time suckas!"
They should a mix of 1GB and 2GB chips.
So total would be 14GB minimum (2 GB chips, and 8 1GB chip) and 18 maximum (2 1GB chip and 8 2 GB chip).
Considering how much effort they went to conceal the die in later shots, the render might be lies.
Exactly. I wouldn't trust any information you could guess from the render. A mix of 2GB chips and 1GB chips ? that's absurd.
I can see a 320-bit bus happening, but it will be uniform chips in my opinion. 10 chips 14 Gbps chips for 20 GB for 560 GB/sec.
However, the bandwith still seems low. A 40 CU Navi comes with a 256-bit bus and (I assume) 14-Gbps GDDR6 chips so around 448 GB/sec BW. Now, if we are going to 60 CU's, the bandwidth will have to go up to support the bigger GPU, but we also need to account for the CPU needs as well. An 8 core Zen 2 will need around 64GB/sec (maybe) ?
Basically, I think for anything other than a 8-9 Tflop console, a 256-bit bus is insufficient. And for that to happen, I think they would need to go to 16 or 18 Gbps GDDR6 chips, but, I'm not sure how doable that is given the increased power consumption and costs.
I think 20GB @ 560 GB/sec on a 320-bit bus would be sufficient for a ~10-11 TF console (54 CUs @ 1500MHz).
However, the bandwith still seems low. A 40 CU Navi comes with a 256-bit bus and (I assume) 14-Gbps GDDR6 chips so around 448 GB/sec BW. Now, if we are going to 60 CU's, the bandwidth will have to go up to support the bigger GPU, but we also need to account for the CPU needs as well. An 8 core Zen 2 will need around 64GB/sec (maybe) ?
Basically, I think for anything other than a 8-9 Tflop console, a 256-bit bus is insufficient. And for that to happen, I think they would need to go to 16 or 18 Gbps GDDR6 chips, but, I'm not sure how doable that is given the increased power consumption and costs.
I think 20GB @ 560 GB/sec on a 320-bit bus would be sufficient for a ~10-11 TF console (54 CUs @ 1500MHz).
Does a 320bit wide require something new from amd's gpu architecture or does it scale that granularly?
If they use dissimilar chip capacities, some chips would serve twice the addressing space which would cripple the average throughput, accesses would be imbalanced. I see zero chance of that happening.
If they use dissimilar chip capacities, some chips would serve twice the addressing space which would cripple the average throughput, accesses would be imbalanced. I see zero chance of that happening.
It's strange. Maybe they wanted 16GB, but didn't think a 256bit bus was enough bandwidth.
With the CPU and the GPU competing for memory bank access in a unified/fused memory system, resulting in potentially significant memory contention, 256bit bus is not the same on a videocard as it is on an APU/SoC, particularly if you want to leverage the full capability of those Ryzen2 cores and the GPU simultaneously.
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Given past experience of knowing renders are dissected and specs inferred, perhaps it's deliberately bunk, just a mockup of a sort of motherboard?
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