ATI and Fast14 - When?

The power draw is still proportional (proportionally squared?) to the clock rate, and video cards are more likely thermally limited than anything else, so does Fast14 logic offer any tangable benefit?
 
Shogun said:
The power draw is still proportional (proportionally squared?) to the clock rate, and video cards are more likely thermally limited than anything else, so does Fast14 logic offer any tangable benefit?
It may be proportional given the same design. Fast14 offers smarter design libraries, basically. They claim massive performance improvements, but it's probably closer to a few percent from what other companies offer.

Edit:
By the way, how power scales with clockrate depends entirely upon where you are in relation to a chip's "maximum" clockspeed. If you're very far below it, it's most likely linear. Get close to the max, and a slight bump in clockrate can dramatically increase power consumption.
 
The answer is most likely in notebook tech or never. They could of just bought it out to prevent it frombeing used against them sort of like Gigapixel and all sorts of other cool little techs at there time.;)
 
Xenus said:
The answer is most likely in notebook tech or never. They could of just bought it out to prevent it frombeing used against them sort of like Gigapixel and all sorts of other cool little techs at there time.;)
Except they didn't they simple got a licence.
 
madmartyau said:
I'm wondering if Fast14 was used for R520 and if that has anything to do with "problems with 3rd party libraries"?


Why R520? Why not RV530 or R580? Fast14 can only accelerate logic but not caches or memory. So IMHO this tech could improve the speed of pixel shaders far better than TMU's. Designing an 3d-chip with pixel-shaders running at 3times the normal MHz would be an good way to pack a lot of shader power into an small package.
 
mboeller said:
Why R520? Why not RV530 or R580? Fast14 can only accelerate logic but not caches or memory. So IMHO this tech could improve the speed of pixel shaders far better than TMU's. Designing an 3d-chip with pixel-shaders running at 3times the normal MHz would be an good way to pack a lot of shader power into an small package.

I think this has been covered in previous discussions. IIRC, one of the dismissive notions was that the logic elements worth "multi-pumping" constitute a rather large proportion of the die anyway, so would create thermal hotspots. Plus, I'm sure such features are pretty difficult to engineer for fabless IHVs.
 
I used to thought that it would appear first in one of the consoles, which much more sensitiveto heat and cost and would also give them a few more changes to try without mesh with a more l"egacy based" architetures like the PC (I supose that in a architetrures like R3/4/5x00 which share a lot it could be problematic).

So I guess that we will need to wait for DX10 parts or Revolution (as it would fit in that case a still very powerfull).

Anyway I am really interested in know the real answer.
 
To me, it seems like the press release is of Intrinsity more than ATi since the link is direct to only intrinsity.com, not ati.com. It would be ATi announcement only if it pressed on ATi own page, I believe in that case. And this press relase sounds like an advertisement of Intrinsity that a big client like ATi use its solution.
BTW... Have a very nice last night on this year :smile:
 
ATI and Intrinsity have a technology development agreement.

http://www.intrinsity.com/press/press_release_ati.htm

I would bet we would see this with R600 in the ALUs. It would seem to make more sense to design this into a new architecture than to alter an existing one to make use of it. R5XX still shares R300 components. A unified architecture would also be a great place to introduce this technology.
 
Chalnoth said:
It may be proportional given the same design. Fast14 offers smarter design libraries, basically. They claim massive performance improvements, but it's probably closer to a few percent from what other companies offer.

Edit:
By the way, how power scales with clockrate depends entirely upon where you are in relation to a chip's "maximum" clockspeed. If you're very far below it, it's most likely linear. Get close to the max, and a slight bump in clockrate can dramatically increase power consumption.

Fast-14 is dynamic logic libraries instead of CMOS. Dynamic logic is harder to design, but features much high frequencies and lower power requirements. Lower power requirements means less heat and which should be significant at 90nm and beyond.

ATI estimates it will use 1/4 the die space of CMOS technology. Not bad for a "few percent" increase.
 
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Could be that fast-14 was used in the R5XX memory controller? Perhaps this is where they had problems with third party IP.
 
rwolf said:
Could be that fast-14 was used in the R5XX memory controller? Perhaps this is where they had problems with third party IP.

Could be. Quote from daves x1800xt review

ATI had already delivered Xenos to Microsoft using the same 90nm process R520 does, and other derivatives of the R520 line suffered the same issue (RV530) but others did not (RV515) - the fact R520 and RV530 share the same memory bus, while RV515 and Xenos have different memory busses is not likely to be coincidental in this case

It seems all chips with the new memory controller (r520,rv530) suffered from the problem.
 
I tried to take a closer look at the documents available on Intrinsity's Fast14 technology. While interesting and promising in some aspects, here are my criticisms:
  • No statement about HDL support, suggesting that Fast14 circuits cannot be generated from standard Verilog or VHDL code. If this is correct, this is a quite serious problem for GPU design; trying to design hardware without good HDLs is a bit like designing software without C or good HLLs; you are reduced to fiddling endlessly with netlists/assembly-code-listings, inflating development time dramatically.
  • The rules for what kinds of gates can actually constructed in dynamic logic tend to change substantially from one process node to the next. While I do expect Fast14 to work on 90/65nm (despite the apparent lack of 90/65nm chips that are known to use Fast14) it isn't clear that you can actually port a design from one process node to another without rewriting/regenerating substantial chunks of netlist source code.
There are also a couple of less-technical issues that, while probably not that serious, bother me a bit as well:
  • Why is ATI the only announced customer?
  • Why aren't the usual 800lb gorillas in EDA (Synopsys, Cadence, etc) aggressively moving in to take over this apparently-superior technology?
 
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