ARM (soc) vs AMD Brazos - Tablet Showdown.

[french toast]

This thread aims to a take serious look into how AMD Brazos would fair against an ARM derived SOC...in a tablet form factor...

Bobcat is quite powerfull little core, designed for tablet form factors in mind, and would more closely match Cortex A-15/Krait power consumption/die size. (rather than BD)

-Also another sub topic to this thread will be the AMD HD Fusion graphics against Current/future mobile Graphics IP (IMG TECH Rogue,Adreno,Mali,Geforce et al )

Any manufacturer/mobile graphics IP can be used for comparison... so long as the comparison sticks with the theme of this thread; ARM V BRAZOS.

-----------------------------------------------------------------------
Many would have read the other thread comparing Cortex-A15 vs Bulldozer -that thread looked to get a better understanding of the IPC difference of the two architectures..in a 17w TDP...leading to which would be a better proposition in an Ultrabook...

...A couple of interesting things became clear, Bulldozer/PD (Trinity) would not be using the same clock speed setup as A-15 SOC and so the serial IPC between the two architectures would be a different to the main thread topic...

Other advantages of both architecture designs were also not being considered for that form factor discusion,
(which certainly would have been utilised in a real world scenario)...
Those are;
- Cortex A7 partnering A-15's..which would give an increased low level power consumption advantage compared to AMD.

- AMD would off set the power consumption disadvantage with there own 'ace'...class leading AMD graphics.(or fusion)

One other thing came up...that although Bulldozer most probably will face off against ARM's best..the most likely scenario..(some would say more fair) would be to use AMD Brazos v ARM (various SOC vendors)...

So let the debate begin

 

[Deleted member 13524]

I wouldn't count on Hondo/Brazos-T being anything spectacular for tablets since it's still essentially a 1,5 year-old nettop/netbook chip built on 40nm.

In the 4.5W model, GPU performance will probably hover around A5X's SGX543MP4 (faster if it has a 400MHz turbo-capable HD6290, slower if it's the 276MHz HD6250) and the 2*1GHz Bobcat might be as fast as a 1.5GHz dual-core Krait.
Memory-wise, it'll use a single-channel 1066MHz DDR3L for ~8.53GB/s, which is lower than A5X's 12.8GB/s but may end up being faster and more efficient because it's a fast/wide single-channel vs. slow quad-channel. It'll probably stand its own against dual-channel LPDDR3 solutions.

However, it still needs a "controller hub" (southbridge) which adds to the general power consumption and DDR3L consumes quite a bit more than LPDDR2.


In the end, performance should be around the best available for Windows 8 tablet launch (November 2012?), but don't expect to see an AMD APU inside a 9mm thin tablet, anything smaller than a 10.1" form factor or a battery life champion model.

2013 will be a lot more interesting for AMD with Tamesh: 2*Jaguar cores and a GCN GPU for tablets.
Hopefully, Tamesh will also include all I/O functions (making it a real SoC) so they can say goodbye to the southbridge (which is usually built on larger nodes so it takes more space and power than if it's also made in the latest process).

 

[french toast]

2013 will be a lot more interesting for AMD with Tamesh: 2*Jaguar cores and a GCN GPU for tablets.
Hopefully, Tamesh will also include all I/O functions (making it a real SoC) so they can say goodbye to the southbridge (which is usually built on larger nodes so it takes more space and power than if it's also made in the latest process).

AMD's fusion is a slightly different form factor than a traditional SOC in the form of Snapdragon right?..surely thats going to be very efficient?
Interesting that A5X has comparable graphics to Hondo...what is the die space difference do you know? A5X is what?...159+ mm2...

However, it still needs a "controller hub" (southbridge) which adds to the general power consumption and DDR3L consumes quite a bit more than LPDDR2.

DDR4 can't come soon enough...AMD has let this Fusion idea slip abit..it was the greatest thing since sliced bread...reminds me abit of the 'trigate will save world nonsense'..i don't know why they couldn't have done something earlier with dual channel LPDR2 1066..on die...maybe some sort of SRAM cache of some sort acting as an L3/L4..on a ring bus....28nm that would be amazing.

 

[Deleted member 13524]

AMD's fusion is a slightly different form factor than a traditional SOC in the form of Snapdragon right?..surely thats going to be very efficient?
Interesting that A5X has comparable graphics to Hondo...what is the die space difference do you know? A5X is what?...159+ mm2...

A5X is 163mm^2 at 45nm, Hondo is afaik the same as Zacate, so 75mm^2 at 40nm.
But as I said, A5X includes all I/O functions and Hondo still needs a separate Southbridge for that.
As far as I can tell, the SGX543MP4 in the A5X occupies quite a bit more space than the Cedar Pro (80 VLIW5 sp, 8 TMUs 4 ROPs) in Hondo/Zacate.
The discrete Cedar Pro occupies some 59mm^2 (292M transistors). The A5X's GPU + memory controller parts seem to occupy about half of the whole chip, so that's ~80mm^2.

If we use some ultra-layman's super-non-techincal measurements, let's say that at 40nm, the SGX543MP4+memory controller would occupy 80*(40/45) = ~~~~71mm^2 (people here will crucify me for doing these calculations because it may or may not be area optimised but whatever)


That said, the SGX543MP4 is probably larger than the Cedar Pro inside Hondo. Take away the Cedar's transistors needed for DX11 compliance and the difference would be even larger.
So yeah, the SGX543MP4 probably has better clock-for-clock performance than the Cedar Pro. Which is why I said that if the Cedar Pro comes at 274MHz (HD6250), it should be slower, but if it turboes up to 400MHz (HD6290) then it might end up quite a bit faster.

i don't know why they couldn't have done something earlier with dual channel LPDR2 1066..on die...maybe some sort of SRAM cache of some sort acting as an L3/L4..on a ring bus....28nm that would be amazing.

These chips have long development cycles (+3 years?), so it's not like AMD could release something like that so soon.
Besides, we do know that AMD's venture into the hadheld/tablet market is a rather recent development. A decision that apparently caused many waves inside AMD and led to some lay-offs and departures.

 

[french toast]

That said, the SGX543MP4 is probably larger than the Cedar Pro inside Hondo. Take away the Cedar's transistors needed for DX11 compliance and the difference would be even larger.
So yeah, the SGX543MP4 probably has better clock-for-clock performance than the Cedar Pro. Which is why I said that if the Cedar Pro comes at 274MHz (HD6250), it should be slower, but if it turboes up to 400MHz (HD6290) then it might end up quite a bit faster

So really, if you take current gen level (Cedar pro) and A5X..cut API compliance down to match...and fill up same die area.....they would roughly have the same perf/clock...thats actually quite incredible.
But thats closer than i would have thought...i would have thought AMD graphics would have been bloated..but vastly more superior, whilst IMG TECH would be significantly smaller...
How that would work out with GCN derived GPU v Rogue class who knows...

These chips have long development cycles (+3 years?), so it's not like AMD could release something like that so soon.
Besides, we do know that AMD's venture into the hadheld/tablet market is a rather recent development. A decision that apparently caused many waves inside AMD and led to some lay-offs and departures

Yea it needed to happen..its what i envisioned the whole Fusion doing..as they already have the IP..most of the design hardwork has been done..its just putting it all together on a tiny budget.

 

[DavidC]

TT, if you look at the Tegra 2 dies though, the A9 cores are about half the size at 40nm than Samsung's 45nm.

So really, if you take current gen level (Cedar pro) and A5X..cut API compliance down to match...and fill up same die area.....they would roughly have the same perf/clock...thats actually quite incredible.

Perf/clock and Perf/area isn't as important as Perf/watt. That is yet to be determined. First we gotta see how Samsung's process is compared to TSMC's.

 

[french toast]

TT, if you look at the Tegra 2 dies though, the A9 cores are about half the size at 40nm than Samsung's 45nm.

Tegra 2 had no MPE..that and the half node.....

Question, ive read people banging on about 'densities'...that different manufacturers have different densities..so one 45nm or not the same as another 45nm??

 

[DavidC]

Tegra 2 had no MPE..that and the half node.....

Question, ive read people banging on about 'densitys'...that different manufacturers have different densitys..so one 45nm or not the same as another 45nm??

BTW, its densities.

Yes, that's right. The differences are usually small, but can get big. Also, the lower speed processes are often denser than higher speed ones. There's also something to be said about Samsung being relatively new in foundry business while TSMC is not.

Let's not look at CPU, but cache. 1MB cache for A5X takes little over 8mm2, while Tegra 2's 1MB cache takes under 4mm2.

It's not really important nowadays whether they call it 45nm or 40nm. They are best classified as 4xnm generation. For TSMC, their 40nm is essentially a renamed 45nm.

 

[french toast]

BTW, its densities.

Ha..my spelling stinks sometimes..will have to activate the spellcheck

Let's not look at CPU, but cache. 1MB cache for A5X takes little over 8mm2, while Tegra 2's 1MB cache takes under 4mm2.

I see, Because Sammy is newer..they can't pack so much in...however in a twist..does that mean that as its less dense..that its also more efficient/better thermals?
Also Sammy uses 'Gate first HKMG' on its 32nm...which is quite alot more advanced.(so ive read)..how would that compare to Intels 32nm HKMG gate last approach?(heard they are also very dense/+mature process)

 

[DavidC]

I see, Because Sammy is newer..they can't pack so much in...however in a twist..does that mean that as its less dense..that its also more efficient/better thermals?
Also Sammy uses 'Gate first HKMG' on its 32nm...which is quite alot more advanced.(so ive read)..how would that compare to Intels 32nm HKMG gate last approach?(heard they are also very dense/+mature process)

No idea. There's nothing being sold on 32nm aside from Intel and AMD chips anyway. I think Intel is densest if you consider the performance, but may lag TSMC in pure density.

 

[french toast]

No idea. There's nothing being sold on 32nm aside from Intel and AMD chips anyway. I think Intel is densest if you consider the performance, but may lag TSMC in pure density.

Those 28nm Kraits are pretty compact then

 

[Arun]

Also Sammy uses 'Gate first HKMG' on its 32nm...which is quite alot more advanced.(so ive read)..how would that compare to Intels 32nm HKMG gate last approach?(heard they are also very dense/+mature process)

My personal opinion only but... Gate-First was originally branded as a simpler and most importantly cheaper option than Gate-Last. When they realised that wasn't the case, they started claiming it was actually better than Gate-Last for this one generation despite very few facts backing that up. They specifically brag about fewer DFM/layout restrictions than TSMC leading to higher density but actually that has nothing to do with Gate-First and everything to do with TSMC using slightly less complex lithography for cost reasons. I have nothing against the Common Platform's 32/28nm process which seems solid at this point from the little I know, but their marketing is worse than TSMC's has ever been since I started following the semiconductor foundry industry.

 

[Arun]

On A15 vs Brazos, I think it's important to realise that A15 should hit higher clock speeds on the same process. As for SGX543MP4 vs Cedar Pro, obviously they're not on the same process (estimating the density from other subsystems is not very reliable but still a sensible first step) and one seems based on all the available evidence to be massively more power efficient than the other There is a fundamental trade-off between area and power efficiency at several levels...

Also argh, missed this pet peeve of mine before...

It's not really important nowadays whether they call it 45nm or 40nm. They are best classified as 4xnm generation. For TSMC, their 40nm is essentially a renamed 45nm.

No it's not. Qualcomm still uses TSMC's 45LP process for all their TSMC 4x nm chips which is less dense than the 40LP process used by NVIDIA. See this article: http://www.beyond3d.com/content/news/608