It could be result of memory bandwidth limit.
Chipworks said:The A10 die size is ~125 sq. mm with a reported 3.3 billion transistors.
We have confirmed the process to be TSMC 16FF-based, so this means that Apple has basically been in the same 20/16nm technology for the last 3 generations, and it took 2 iterations on FinFET for Apple to get the A10 back to the gate densities we saw in the A8, optimized on a planar process.
A notable difference from the A9 to the A10 is much tighter SoC-level die utilization, which is more in line with the A8. This, along with tighter 9-Track and 7.5-Track libraries of an 16FFC process, are expected to have kept the die from bloating to the ~150 sq. mm level that we were expecting from a straight scale of the A9 to the A10, in terms of transistor count.
One interesting side note is that Apple mentioned it's a 6 cluster design but the 7XT in the A9 has no announced successor, much less one with 50% more arithmetic throughput. Oh, and this GPU consumes 2/3 the A9 GPU power on the same process.
8XT is not announced, but is being actively licensed. 7XT was quoted as providing 60% performance increase on 6XT, so the generational performance increase would be consistent.
The performance on multiple graphics benchmarks, including GFXBench's most strenuous all-around test, 1440p Manhattan 3.1.1 off-screen, supports the claim of 50% improvement.
gfxbench comparison with A9 in the 6s is very interesting.
https://gfxbench.com/compare.jsp?be...S&api2=metal&hwtype2=GPU&hwname2=Apple+A9+GPU
Manhattan 3.1 offscreen A10=1631 A9=1521 7%
Manhattan offscreen A10=3036 A9=2184 39%
Trex offscreen A10=4973 A9=4139 18%
Texturing offscreen A10= 8473 A9= 5972 42%
ALU off screen A10=5406 A9=3823 52%
Long term performance Mahattan A10=3553 A9=1804 97%
Big variations in improvement. Manhattan 3.1 barely shows any improvement at all. Trex less that 20%. But ALU & Texturing are close to the 50% that was stated in Apple's presentation.
One interesting side note is that Apple mentioned it's a 6 cluster design but the 7XT in the A9 has no announced successor, much less one with 50% more arithmetic throughput. Oh, and this GPU consumes 2/3 the A9 GPU power on the same process.
1440p shows around 12% improvement compared to iphone6s ?
You always have to wait a bit until results pile up from different sources to get a clearer picture. This link https://gfxbench.com/device.jsp?benchmark=gfx40&os=iOS&api=metal&cpu-arch=ARM&hwtype=GPU&hwname=Apple A10 GPU&did=28447322&D=Apple iPhone 7 gives a completely different picture then from the results you've picked
It looks like the little cores are right beside the big ones.Chipworks has a die picture of the A10.
Chipworks said:Update: We have revised our first A10 floorplan with help from our friends at AnandTech in the search for the small, high-efficiency cores. Our combined guess is that it is likely they are indeed integrated within the CPU cluster next to the big, high-performance cores. This makes sense given the the distinct colour of the small cores indicating a different digital library, and the position of the big core L1. Thanks to our friends over at Anandtech for reviewing the floor plan with us and providing input on where these blocks might be located!
I crudely made that diagram. I have a much more detailed one I'll keep for the review.Wouldn't having the small cores "embedded" into the bigger one make it much more difficult to have different clock (and potentially power) domains?
If you want a dumb SoC with no multimedia, connectivity or imagining featuresOne has to wonder what all the other unmarked blocks are for, there is enough space there to double the CPU + GPU,
Just a very crude copy paste:
View attachment 1602
If you want a dumb SoC with no multimedia, connectivity or imagining features
In addition to that, could losing some of those areas keep it from powering up or running?If you want a dumb SoC with no multimedia, connectivity or imagining features
Not sure what those structures are. Probably related to the NoC connectivity. The L3 array is divided in 8+8 columns, the top and bottom columns are just slightly differently laid out.In addition to that, could losing some of those areas keep it from powering up or running?
It would be like taking a diagram of the brain and realizing there could be so much more visual cortex if a chunk were merely copied over that boring brain stem.
Is there some idea on the role of the yellow and blue structures on the left, top, and bottom edges of the L3 interface?
The upper L3 array appears to be subdivided differently from the lower as well.