Anand says - now that NV30 is taped out - we can reveal...

Discussion in 'Architecture and Products' started by g__day, Aug 14, 2002.

  1. g__day

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    But Russ - in the collorabative design and die shrink process - who would own the IP of how to do it optimally - is it joint or 95% exclusive to TSMC - to give to any competitor of NVidia who paid them to gain this IP - time and time and time again?

    Cause if I were NVidia I would have liked to say the IP is mutual and we get a royalty - or 100 days etc before you can reveal the insights needed to make this work to our biggest competitor.

    I presume your can't patent this knowledge - but is it protected in other ways?
     
  2. PiNkY

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    nv30 tapeout was not delayed because of tsmc's supposed yield problems @ .13 micron but simply because the chip design itself was not finished until recently (that is what is basically meant by tapeout: (logical) chip design ready --> sent to fab)
     
  3. in_04

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    Intresting on the whole R300<->NV30 story for me is who made the first below $300 DirectX 9 card.
    ATI will anounce a Radeon 9500 card this month and it should be ready for the holiday sales too.
    If this one is nearly as fast as the current Geforce 4 and the price is between $200-250 that card would be the "real" seller in the holiday sales.
    And with low yield rates for the NV30 I didn't see a cheap NV30 solution before the NV31 will come. The NV31 currently is scheduled for the first quarter of 2003. So if ATI get the Radeon 9500 ready for holiday sales and maybe there come a Radeon 9700 without PRO for ~$350, this and the next quarter would be hard for Nvidia :-?

    Just my 2 cents
     
  4. Laa-Yosh

    Laa-Yosh I can has custom title?
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    Regarding theoretical performance, everyone seems to forget about drivers.
    Both R300 and NV30 are new architectures, and this suggests that initial drivers may only make use of 60-70% of the potential of the chip. Remember the Geforce3, or the Radeon 8500?
    The three-four months that ATi has gained with the R300 means that even on slower hardware, they might be able to take and hold the performance crown...
     
  5. g__day

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    I thought the interconnects caused the problem - isn't this a issue of die / manufacturing fabrication process related to the complexity and phlisopy of the chip design. Were some of the interconnects error because the chip was just too complex for the fab to build it reliabily?

    Apart from faulty wiring (logic) I would assume that bad signal timing or excess capitacance would be a big killer problem. Get that sorted on an optimal design and you are alot fo the way there?
     
  6. martrox

    martrox Old Fart
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    Couple of interesting points:

    1)IF the problem is not the .13 fab, and instead was the chip design, then maybe the rumors about a changeover from a 128 bus to a 256 bus due to R300 is right.
    2)IF it's a 8x2 pipe architecture, maybe that rumor about 30 gig bandwidth is right. Otherwise, it will be a very unbalanced product.

    Looks like it will be a few months before we really know the truth about NV30. Until at least the beta cards are independently seen & tested, I doubt you will hear anything except FUD on it.

    One thing can be taken as fact from this, it that there are too many people that think the have more “knowledgeâ€￾ on this product than really do.

    Bottom line: Believe only half of what you see, and none of what you read & hear! BTW, this applies to everything in life…… unless it’s something you wife tells you, then it’s the gospel! :roll:
     
  7. kid_crisis

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    From Anantech article: "The yields on 0.13-micron NV30 chips aren't high at all unfortunately; currently yields are between 10 and 20%, meaning that for every 10 chips made, only 1 or 2 are actually functional. Once again, to put things into perspective, neither AMD nor Intel would ever produce and ship silicon with yields as low as 3 - 4 times that. Even Intel's largest chips that already rival these GPUs in transistor counts have much higher yields."

    I have to agree with a previous poster, this doesn't sound like an estimate of yield, this sounds like they know the chip will yield poorly.

    One possible explanation for all these conlicting rumors: Nv30 has just taped out for the first time AND they have run working samples already. Heh.

    Consider, if they ran the NV30 initially on the TSMC 0.13um low-k process, then they may have samples and they would have known if they had terrible yield.

    Then, if they had to switch to TSMC's 0.13um process without low-k dielectrics, that would require them to substantially redesign the chip. It's not as bad as going to a different foundry, but it would require re-calculating all the timing on the chip. Whenever you change the process you are on, it's pretty much a new tapeout. (This may explain the pause and strange wording when Jen Hsun answered the question about NV30 taping out "Then I would say the answer is no.")

    This explanation would allow most of the apparently conflicting rumors about Nv30 to be true, i.e. there are NV30 samples, the yield is very low (15%), but they have also just taped out the chip.

    Hopefully this means the yield will be higher than the rumored 15%.
     
  8. jb

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    g__day

    your missing my main point. Yes there will be a lot of nV Specifics that TMSC can not share with ATI or others. However there should be a lot of process improvements and tweaks that they will learn about. These are more general and not related to specifics on the nV30 (related to the .13u process in general). These they can share with all of their customers that want to use the .13u. As Rus said they want to make money and not using common tweaks would be just plain dumb of them not to do.
     
  9. Guest

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    The NV30 can be faster on paper without being 8x2. If it just has a higher clock speed than the 9700 (which seems likely), it can theoretically put out more pixels than the 9700 if it is still only 8x1. Does it have that many more transistors than the 9700 that it can support twice as many texel units and longer shaders as well as a higher-precision pipeline?

    Does anyone here still think the NV30 will be released with 128 bit interface to 480/500 MHz DDR-II memory? This would fit the rumored 48 Ghz "effective" bandwidth with nVidia's traditional estimate of 2.5x overdraw. It's said that the bus is 256 bits, but they've had a 256 bit bus with an 128 bit DDR interface since the GeForce 256. Is it possible to switch the memory interface to 256 bits late in the chip's design? If the memory interface is in fact 128 bits, will they try to keep that information secret for as long as possible?

    If the memory interface is in fact 128 bits, won't there be some bandwidth-limited circumstances, particularly on older (Quake 3-engined) games where the 9700 Pro will out-benchmark the NV30? Will nVidia have to rely on custom or DX9-specific benchmarks to claim the performance crown?
     
  10. Xspringe

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    I wonder if the the fact that certain parts of the r9500 are disabled will allow it to have higher clockspeeds... Because ideally the 9500 would have +- ti4600 performance.
     
  11. LeStoffer

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    Anandtech wrote:
    Does this mean that they sent the first tape-out to TSMC last week, or does this mean that they got the first silicon from the tape-out back from TSMC last week?

    I guess the first is true, but silicon can't tape-out. A design of a chip can tape-out. Russ?
     
  12. RussSchultz

    RussSchultz Professional Malcontent
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    I'd assume the fabrication of first silicon had just started, and they'll get the first chips back from the fab 6-8 weeks after tapeout. (Whenever that was...yesterday, a week ago, two weeks ago)
     
  13. Joe DeFuria

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    Well, ANAND defines tape-out as such:

    Now, I believe Anand's definition differs from actual manufaturing terminology, which is what's causing the confusion. (Russ?) Tape-out does not refer to receiving back functional silicon. Doesn't it refer to sending the first "complete instructions / detailed design" to the foundry to be able to attempt production of the first silicon samples?

    So, one of two things occurred:

    1) nVidia told Anand that they received first functional silicon back from the fab. Anand believes this means "tape-out" (or nVidia PR told him it means "tape-out"), and hence his statements.

    or

    2) nVidia told Anand that NV30 just "taped out." Anand assumes that this means that first silicon is back from the fab based on his own erroneous definition of "tape-out."

    Now, Anand is making it seem as if first functional silicon is back from the fab, so hopefully number one is the case. If number 2 is the case, then we have a some big miscommunication going on...
     
  14. Snap

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    whys it so likely? The offset in die space savings from .15um to .13um isn’t that high and they are doubling the complexity of the chip. NV have already set the precedent in going down clockspeeds from GF2 Ultra to GF3, so I wouldn’t be surprised if it happens again.

    Supposedly ati fiddled with R300 manually to get that up to those speeds and we don’t know how much time they spent doing it. NV don’t have that luxury of time in this case so it wouldn’t surprise me if they only hit 300Mhz (or less) – they may need 8x2 to exceed r300.
     
  15. RussSchultz

    RussSchultz Professional Malcontent
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    If I wasn't so frickin' busy with work and building a house, I'd offer to do a "asic manufacturing for dummies" article for Beyond3d.

    I'm sure I'd learn a lot in the process, too. There's so much that's interesting that I only understand bits and pieces of.
     
  16. LeStoffer

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    Great idea... and maybe you could educate Anand during the course! :wink:
     
  17. Doomtrooper

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    I agree, this chip has more transistors than a Athlon XP or Pentium 4..and more than the Upcoming hammer and Intel CPU's and people think becuase its .13 it will clock higher automatically.
    The Thoroughbred from AMD @.13 did not gain alot in terms of performance over a Athlon XP @.18..even the thermals were about the same.
    I guess it depends on the complexity of the chip if .13 micron will help in terms of performance...the Athlon XP shrinking to .13 really didn't help it much.
     
  18. Reverend

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    My only comment - this is the first time I have seen such an article from Anand. Wonder why....
     
  19. Doomtrooper

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    Athlon XP Core @ .18 Thoroughbred 130 nm core


    [​IMG]
     
  20. Sabastian

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    Many already know this but AnandTech is very close to nvidia. In my opinion I think this is nvidias way of saying that the card will be late. Gently breaking the news to the market and potential buyers through a site that is known for particular attention for nvidia.
     
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