AMD's best is still to come

Yes the Conroe is based on a combination of the P3, Banias, Dothan and Yonah but it's design and architecture is very different.

"Core architecture won't scale" : I took that statement in the meaning of scaling up a SMP system
K8L will scale very nicely to 16 cores and 32 cores ; you don't even try to imagine 16 "Core Xeon" cores fighting for the same FSB.

This is why Intel will finally integrate their own memory controller, currently scheduled sometime at the end of next year. Their quad core chips coming out in December are basically a temporary solution to beat out AMD's quad core chips coming out next year.
 
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"Core architecture won't scale" : I took that statement in the meaning of scaling up a SMP system :p
K8L will scale very nicely to 16 cores and 32 cores ; you don't even try to imagine 16 "Core Xeon" cores fighting for the same FSB.
The big Xeon MP systems use multiple-FSBs. The IBM and Unisys ones that go upwards of 32 sockets use dual-FSBs per 4 socket nodes. And because of superior chipset logic, they score better in important benchmarks like TPC-C and SAP-SD than any Opteron.
 
but it's design and architecture is very different.
What do you base that 'very' on? From earlier browsing of Intel tech docs and a quick read-through of the article Accord1999 posted above is seems to me to be a natural evolutionary advance from the line which started with Banias. It's obviously in Intel's best interest to give the perception that it is all new and shiny, and of course it is different, but very different?
 
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Xenon has unified L2 Cache and everyone says it's the worst thing ever.... Core has unified Cache and people think it's great :???:

I think the word for Conroe's L2 cache is shared, not unified.

It's double the size of L2 for each core, assuming the other core isn't using too much.
Though the cost is an extra cycle or so for handling the multiplexing.

There are trade-offs, but it probably is a good thing most of the time.
 
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