- Senior Engineer: Lead Floating-Point Unit at Bulldozer microprocessors. I have
developed high-level-design concepts for the SIMD FPU architecture, detailed logic constructions,
controlling the pipelines, defining critical custom data-path macros, and supervising
placements/layouts. I have performed RTL coding for the latest Bulldozer series.I performed the timing closure tasks and revised the design to meet the performance/power commitments. I was a focal-point for tool issues and was always constant communicating with the EDA team.
- Custom Register Files: I accomplished successful designs and deliveries of the Register File
macros for 40nm and 22nm microprocessors with different generations of AMD's 22nm, 32nm, and 45nm SOI Technologies.
Currently, I am responsible for the RF-macros at Memory Controller and Instruction Fetch Unit for Bulldozer with AMD 14nm FIN-FET Technology, including multiple Read/Write ports with Content-Addressable-Memory, and Parity generation. I have performed the VHDL set-up, custom circuit designs, the timing critical-path analysis, and the supervision of the layouts.