AMD Vega 10, Vega 11, Vega 12 and Vega 20 Rumors and Discussion

silent_guy said:
Don't be ridiculous.
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Now you're the one being silly. There is no such thing as free lunch.

You are not comparing like for like unless you take into account functionality. Perhaps all the extra transistors is needed for that additional functionality. How do you know the competitors wouldnt end up with even more trannies to hit the advanced functionality?
 
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Clukos said:
significantly higher power draw?
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We don't know what the power draw will be, Vega FE was running @ 1600mhz @ 1.1v and around 300w.

1080 AIB run mostly 200w+ out of the box for 5-10% more perf than 1080 FE (which throttled like crazy to keep its low TDP)

Sadly sites don't test power draw of a 1080 OC'd because then we'd get rid of this ridiculous Vega power hungry meme. Yes, Vega FE uses more power than a 1080, but not a significant amount. We haven't seen how RX power consumption compares but it should bring better perf/watt over FE.
 
Anarchist4000 said:
That's where it gets tricky. The only safe definition is that packed math is a single instruction performing two operations. The actual implementation could vary wildly based on circumstance.
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It's a pretty safe bet packed math means packed data format, that is, within a register. The packed terminology goes back at least as far as the introduction of MMX, and CPU SIMD extensions readily included packed math on the data arranged in a packed format within a single SIMD register.

AMD's packed FP16 instructions aren't doubling their register fields, and the non-packed FP16 operations have selection bits to choose operands from within a standard register.

Still withholding judgement here as it's possible a larger die is cheaper. Close to perfect yields and 484 could be cheaper than 315. The power however needs some explanation.
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How bad are the yields on the mature 315mm2 product? It would need to be measurably worse even now for even perfect yields to get past the area disparity, and if they were that perfect there wouldn't be a cut-down Vega.
 
What has me thinking is that, if we were to take AMD's Vega marketing shot from a few months back at face value, the areas with the least ambiguous departure from expectation are the CU arrays and potentially the strip of silicon down the center where the command front ends and geometry processor hardware sits.

The front-end section has about the same proportion of the die as other GPUs like Polaris 10, but on a die about twice as large as Polaris 10 it doesn't yield a leap in culled geometry throughput. The non-culled throughput in the synthetics does show some measurable improvement and it's not that far from some Nvidia GPUs. The inability to cull in the same range may be where this area might not be punching at its weight. Perhaps this is related to primitive shaders or somesuch, but it would be unfortunate if even slight improvement needs software intervention. I wouldn't be sure if the beyond3d synthetics are the type that the new rasterizer would necessarily provide much benefit for, since the tests don't strive to create a very complex culling situation.

Perhaps more curious is the area of the CU arrays, relative to what they've offered so far. If they were to shrink to the area of a Polaris CU, I think Vega could be perhaps ~15% larger than GP104, the area AMD gives them in its marketing is that unusually disproportionate. I think I agree that FP16 shouldn't be responsible for the area increase.
(ed: at least not the very large increase seen)
 
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3dilettante said:
It's a pretty safe bet packed math means packed data format, that is, within a register. The packed terminology goes back at least as far as the introduction of MMX, and CPU SIMD extensions readily included packed math on the data arranged in a packed format within a single SIMD register.

AMD's packed FP16 instructions aren't doubling their register fields, and the non-packed FP16 operations have selection bits to choose operands from within a standard register.
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I'd agree, but with tensor style operations there exists the possibility of four independent input operands. That's the sole reason I'm withholding judgement. Another possibility with Tensors is a scalar broadcast freeing operands. Tensors may very well share an operand allowing some really interesting capabilities along with the scalar broadcast. Getting four multiplications per lane in a single cycle if the hardware allows it.

3dilettante said:
How bad are the yields on the mature 315mm2 product? It would need to be measurably worse even now for even perfect yields to get past the area disparity, and if they were that perfect there wouldn't be a cut-down Vega.
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Not that bad, but there could be a performance aspect to it. Cut would be a result of the fabric working around defects with no extra steps. If all control is over the fabric, there is very little that couldn't be redundant. At the very least it may offset some of the cost.
 
DavidGraham said:
These are minimum fps, not averages, and they are cherrypicked as well. Since they show FuryX having better minimums than 1080.
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It's a decent range of games though. Part of what AMD was touting with their blind tests was the better delivery of frames so perhaps there is something to the architecture that will give us more consistent frame times and much better minimums. After all, we've been moving towards that as both a benchmark measurement and the result providing a better gaming experience.

We should have a decent range of reviews from the good testers to show us this in practice soon.
 
Anarchist4000 said:
Not that bad, but there could be a performance aspect to it. Cut would be a result of the fabric working around defects with no extra steps. If all control is over the fabric, there is very little that couldn't be redundant. At the very least it may offset some of the cost.
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I see what the superset of Hypertransport is used for in the CPU space, and what it accomplishes there. I do not see a mechanism provided on why it should change the GPU silicon yield picture, at least not for the better.
 
So the Liquid Cooled version is not available by itself but only in the "pack" for $699 which includes $100 off a Ryzen and $200 off a Samsung Ultrawide monitor. It's a fantastic deal for new builders.... tough shit for me though.
 
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