AMD Vega 10, Vega 11, Vega 12 and Vega 20 Rumors and Discussion

Discussion in 'Architecture and Products' started by ToTTenTranz, Sep 20, 2016.

  1. CarstenS

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    Can anyone hazard a guess as to how much difference size and performance of memory controllers could be impacted by using third party IP compared to uniquely designed and optimized custom logic?
     
  2. Cat Merc

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    Would be rather difficult. On one hand a controller made specifically by you is fine tuned exactly for your needs. On the other hand, a third party controller has far more dedicated support (unless you're Intel), and it's not like they can't be tuned for your application. I doubt they're just plugged in as is with high performance devices.

    My guess would be about the same, with internal development simply reducing your reliance on third parties.
     
  3. mpg1

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    not that familiar with mining but you'd think the higher power consumption would make these cards less desirable to have..
     
  4. silent_guy

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    Which would justify my claim that Vega is their worst design ever. :)
     
  5. ToTTenTranz

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    Yes, you apparently think you get to legitimately criticize AMD's engineers either way.
     
  6. silent_guy

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    Why does "packed math" mean?

    I thought it meant that you can only achieve double FP16 operations is the operations of the FP16 are identical and if the FP16 operands are also part of the same 32-bit register.

    That is: op1 has operand A in RegA[15:0] and op2 has operand A in RegA[31:16].

    Otherwise, your operand fetching logic needs to be converted from 32 to 16 bits.

    I don't think it automatically means that the FP16 ALUs are created out of the FP32 ALU.
     
  7. silent_guy

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    I think it'd be insulting to the AMD engineers to give them a pass for being able to design a chip that's only 80% as good as the competition.
     
  8. ToTTenTranz

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    #3108 ToTTenTranz, Jul 30, 2017
    Last edited: Jul 30, 2017
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  9. BRiT

    BRiT (╯°□°)╯
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    They have no competition because the other players are severely lacking the new functionality.
     
  10. silent_guy

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    Don't be ridiculous.

    Using that same broken reasoning, AMD and Nvidia have never competed because of some mismatch in features. GTX 1060? Not a competitor against an RX 480 because the former has quad INT8, simultaneous multi-projection, and a bunch of other irrelevant features.
     
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  11. Alexko

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    Even after factoring in the respective available resources?
     
  12. ToTTenTranz

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    Oh now we're ridiculous because 2*FP16 is now an irrelevant feature.
    This just gets better and better.


    Of course! Anything is valid to bring out the pitchforks on AMD engineers..
     
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  13. Clukos

    Clukos Bloodborne 2 when?
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    So the latest rumors point towards 1080 price for > 1080 performance and significantly higher power draw?
     
  14. eastmen

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    It really depends . Imo however 1080p performance at $400 will be a huge upgrade over my 290 . Overclocking my 290 i can get close to 290x performance but i put an aio watercooler on it. So if i could do the same with a $400 vega and bump its performance over a 1080 or similar to a 1080ti that would be a good value imo
     
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  15. silent_guy

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    I think so.

    In the last 5 years, we've gone from Kepler to Maxwell/Pascal to Volta or two major architecture changes.

    In the same 5 years, AMD has made some incremental updates to GCN that are similar in scope to going from Maxwell to Pascal.

    They've had 5 years to come up with NCU.
     
  16. silent_guy

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    A few posts ago, I use an adjusted die size for GP102-with-2xFP16 to compare against Vega. That should have given you a hint that I don't consider FP16 an irrelevant feature.

    Also notice that I called a few Pascal features irrelevant, not AMD features.

    What is wrong with you?

    I'm sure there are tons of top notch AMD engineers. But if it turns out that a 484mm2 die is only competitive against a 315mm2, then something went terribly wrong, and we won't be able to blame AMD marketing for a change.
     
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  17. Anarchist4000

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    That's where it gets tricky. The only safe definition is that packed math is a single instruction performing two operations. The actual implementation could vary wildly based on circumstance.

    Still withholding judgement here as it's possible a larger die is cheaper. Close to perfect yields and 484 could be cheaper than 315. The power however needs some explanation.

    Testing of FE points towards that, but we haven't seen the binning or any other performance enhancing features.
     
  18. yuri

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    So far it seems it's competitive only performance wise. The power consumption and heat/noise metrics seem to be way worse than 1080's.
     
  19. silent_guy

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    It seems to me that moving from a 3x 32-bit to a 6x 16-bit operand fetch architecture is more expensive than moving from identical operands to multiple operands.
    For a change, this is probably one of the things that will become clear once AMD releases the NCU programming guide.

    Even without taking HBM into account, I can't imagine a scenario where that could be the case.
     
  20. CarstenS

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    SIMD-inside-SIMD?
    Not automatically, no. But conventional wisdom would have reuse FP32 resources. Of course AMD might have gone the extra mile and build dedicated FP16 units into the GPU that are fed by the same logic that feeds the FP32 ALUs - sacrificing in turn a possible advantage of having a virtual 128 FP16-CUs instead of 64 2xFP16 ones.

    But hey, Nvidia also felt that adding additional FP64 units and now units optimized solely for tensor operations was worth it. So, maybe that's a good choice - if you can go 815 mm² and sell your GPU for 10,000+ bucks.
     
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