Would be rather difficult. On one hand a controller made specifically by you is fine tuned exactly for your needs. On the other hand, a third party controller has far more dedicated support (unless you're Intel), and it's not like they can't be tuned for your application. I doubt they're just plugged in as is with high performance devices.Can anyone hazard a guess as to how much difference size and performance of memory controllers could be impacted by using third party IP compared to uniquely designed and optimized custom logic?
Unfortunately no matter the performance, even if AMD price these cards low, the retailer's will be charging ridiculous amounts of cash for them (well here in the UK at least) The GTX 1070's are £450+ when they are available, and even the rubbish at mining 1080's are still £550+. So short of supply Vegas will get gouging prices.
Which would justify my claim that Vega is their worst design ever.For all you know, AMD could need 5x more area than nvidia for the same end result.
Which would justify my claim that Vega is their worst design ever.
Why does "packed math" mean?If only those were not advertised as „packed math“. As such, reusing existing FP32 resources, the die size implications should be less than massive.
I think it'd be insulting to the AMD engineers to give them a pass for being able to design a chip that's only 80% as good as the competition.Yes, you apparently think you get to legitimately criticize AMD's engineers either way.
Of course you do...I think it'd be insulting to the AMD engineers to give them a pass for being able to design a chip that's only 80% as good as the competition.
I think it'd be insulting to the AMD engineers to give them a pass for being able to design a chip that's only 80% as good as the competition.
Don't be ridiculous.They have no competition because the other players are severely lacking the new functionality.
I think it'd be insulting to the AMD engineers to give them a pass for being able to design a chip that's only 80% as good as the competition.
Don't be ridiculous.
Using that same broken reasoning, AMD and Nvidia have never competed because of some mismatch in features. GTX 1060? Not a competitor against an RX 480 because the former has quad INT8,simultaneous multi-projection, and a bunch of other irrelevant features.
Of course! Anything is valid to bring out the pitchforks on AMD engineers..Even after factoring in the respective available resources?
what are the chances the Vega 56 matches 1080 performance though..
I think so.Even after factoring in the respective available resources?
A few posts ago, I use an adjusted die size for GP102-with-2xFP16 to compare against Vega. That should have given you a hint that I don't consider FP16 an irrelevant feature.Oh now we're ridiculous because 2*FP16 is now an irrelevant feature.
This just gets better and better.
I'm sure there are tons of top notch AMD engineers. But if it turns out that a 484mm2 die is only competitive against a 315mm2, then something went terribly wrong, and we won't be able to blame AMD marketing for a change.Of course! Anything is valid to bring out the pitchforks on AMD engineers..
I thought it meant that you can only achieve double FP16 operations is the operations of the FP16 are identical and if the FP16 operands are also part of the same 32-bit register.
That's where it gets tricky. The only safe definition is that packed math is a single instruction performing two operations. The actual implementation could vary wildly based on circumstance.Otherwise, your operand fetching logic needs to be converted from 32 to 16 bits.
Still withholding judgement here as it's possible a larger die is cheaper. Close to perfect yields and 484 could be cheaper than 315. The power however needs some explanation.I'm sure there are tons of top notch AMD engineers. But if it turns out that a 484mm2 die is only competitive against a 315mm2, then something went terribly wrong, and we won't be able to blame AMD marketing for a change.
Testing of FE points towards that, but we haven't seen the binning or any other performance enhancing features.So the latest rumors point towards 1080 price for > 1080 performance and significantly higher power draw?
So far it seems it's competitive only performance wise. The power consumption and heat/noise metrics seem to be way worse than 1080's.I'm sure there are tons of top notch AMD engineers. But if it turns out that a 484mm2 die is only competitive against a 315mm2, then something went terribly wrong
It seems to me that moving from a 3x 32-bit to a 6x 16-bit operand fetch architecture is more expensive than moving from identical operands to multiple operands.That's where it gets tricky. The only safe definition is that packed math is a single instruction performing two operations. The actual implementation could vary wildly based on circumstance.
Even without taking HBM into account, I can't imagine a scenario where that could be the case.Still withholding judgement here as it's possible a larger die is cheaper. Close to perfect yields and 484 could be cheaper than 315.
SIMD-inside-SIMD?Why does "packed math" mean?
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I don't think it automatically means that the FP16 ALUs are created out of the FP32 ALU.