If Navi 2x GPUs have a monster last level cache, then consoles games will not be built to take advantage of it, because consoles don't have such a monster cache.
Why wouldn't it be reliant on RDNA2's memory subsystem or HBCC like unit to realize that it has available cache and can keep the data closer?If Navi 2x GPUs have a monster last level cache, then consoles games will not be built to take advantage of it, because consoles don't have such a monster cache.
I wonder if ROPs are bound to shader arrays.
If the rumoured size is accurate, has to be more. 64 perhapsbigly claims are bigly
Im really not sure on the rumoured die sizes, a 40cu die taking 340mm when RDNA1 40cu GPU takes 250 and the consoles also taking about the same area as RDNA 1.
I'm trying to make sense of this ... I think he's saying that he didn't want to post their numbers, but he confirmed their 3080 numbers were similar to his, so instead of posting the 6800XT number they sent him he "estimated" the number from his 3080 based on the ratio of the 3080 to 6800XT numbers they sent him ... it's really dumb, and I have no idea why he'd do something so convoluted, but it's the only interpretation I can come up with.
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He also added another 10% to the 6800xt scores to account for a new driver. it is a bit odd that all the leaks are for 3dmark. Maybe AMD did like Nvidia and whitelisted only certain apps for AIB drivers. There’s also talk of AIBs having artificially crippled drivers. Wednesday can’t come soon enough.
He also added another 10% to the 6800xt scores to account for a new driver. it is a bit odd that all the leaks are for 3dmark. Maybe AMD did like Nvidia and whitelisted only certain apps for AIB drivers. There’s also talk of AIBs having artificially crippled drivers. Wednesday can’t come soon enough.
This is not so clear, the way he words that seems to mean AMD supplied a new driver which brought a 10% increase in scores, and the scores he was showing were achieved with that driver.
He was principal engineer at Playstation for the PS5 and he seems to talk about NX gamer video about the rumored infinity cache
It's interesting that the biggest change in both Zen3 and RDNA2 seems to be massively reworked cache.
This is not so clear, the way he words that seems to mean AMD supplied a new driver which brought a 10% increase in scores, and the scores he was showing were achieved with that driver.
Not totally surprised.
I've seen patent documents talk about the problem of dealing with the overheads of small cachelines (e.g. 64 bytes) while using monster caches. The solution is based upon regions (from/to addresses). Which would map nicely to things like render targets and UAVs.My guess is if there is some kind of huge cache then AMD is pinning entire buffers in that cache to avoid thrashing. Probably via heuristics of which render targets & UAVs are accessed most frequently.
256-bit MC + PHY is about 64mm².I haven’t given up on the option that they simply went with a 512-bit bus though.