AMD, IBM Announce Dual Stress Liner

[one]

http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~91999,00.html

SUNNYVALE, CA and EAST FISHKILL, NY -- December 13, 2004 --AMD and IBM today announced that they have developed a new and unique strained silicon transistor technology aimed at improving processor performance and power efficiency. The breakthrough process results in up to a 24 percent transistor speed increase, at the same power levels, compared to similar transistors produced without the technology.

...

The new strained silicon process, called “Dual Stress Liner,â€￾ enhances the performance of both types of semiconductor transistors, called n-channel and p-channel transistors, by stretching silicon atoms in one transistor and compressing them in the other. The dual stress liner technique works without the introduction of challenging, costly new production techniques, allowing for its rapid integration into volume manufacturing using standard tools and materials.

...

Details of the AMD-IBM Dual Stress Liner innovation will be disclosed at the 2004 IEEE International Electron Devices Meeting in San Francisco, Calif. from December 13-15, 2004. The Dual Stress Liner with SOI technology was developed by engineers from IBM, AMD, Sony and Toshiba at IBM’s Semiconductor Research and Development Center (SRDC) in East Fishkill, NY, as well as engineers from AMD at its Fab 30 facility in Dresden, Germany.

 

[GwymWeepa]

http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543~91999,00.html

SUNNYVALE, CA and EAST FISHKILL, NY -- December 13, 2004 --AMD and IBM today announced that they have developed a new and unique strained silicon transistor technology aimed at improving processor performance and power efficiency. The breakthrough process results in up to a 24 percent transistor speed increase, at the same power levels, compared to similar transistors produced without the technology.

...

The new strained silicon process, called “Dual Stress Liner,” enhances the performance of both types of semiconductor transistors, called n-channel and p-channel transistors, by stretching silicon atoms in one transistor and compressing them in the other. The dual stress liner technique works without the introduction of challenging, costly new production techniques, allowing for its rapid integration into volume manufacturing using standard tools and materials.

...

Details of the AMD-IBM Dual Stress Liner innovation will be disclosed at the 2004 IEEE International Electron Devices Meeting in San Francisco, Calif. from December 13-15, 2004. The Dual Stress Liner with SOI technology was developed by engineers from IBM, AMD, Sony and Toshiba at IBM’s Semiconductor Research and Development Center (SRDC) in East Fishkill, NY, as well as engineers from AMD at its Fab 30 facility in Dresden, Germany.

I wonder if Sony will find a use for this technology *dies of stupidity*

 

[jvd]

Wonder if ms and nintendo will find uses for this (dies of stupidity)

 

[one]

Wonder if ms and nintendo will find uses for this (dies of stupidity)

Depends on the licensing cost? You can't get an additional topping for your icecream for free...

 

[London Geezer]

Wonder if ms and nintendo will find uses for this (dies of stupidity)

Depends on the licensing cost? You can't get an additional topping for your icecream for free...

You can if you're really cutey to the ice cream man and offer him sexual favours.

 

[jvd]

Wonder if ms and nintendo will find uses for this (dies of stupidity)

Depends on the licensing cost? You can't get an additional topping for your icecream for free...

WHy would they need to liscense it ? THey aren't making fabs. They will most likely have thier cpus produced on ibm fabs which should take advantage of this as soon as sony / toshiba fabs do

 

[one]

Wonder if ms and nintendo will find uses for this (dies of stupidity)

Depends on the licensing cost? You can't get an additional topping for your icecream for free...

Why would they need to liscense it ? THey aren't making fabs. They will most likely have thier cpus produced on ibm fabs which should take advantage of this as soon as sony / toshiba fabs do

Well MS and Nintendo need a license if they make CPUs in TSMC/Charter/NEC/..., or have to pay for the premium fee for this technology if they ask IBM making CPUs / or in other words buy chips from IBM.

IBM is not an ally of MS/Nintendo in fab technology like Sony/Toshiba/AMD, but the licensor of the Power architecture to Microsoft at this point at least (in the case of the GC, also the chip fab). Now Sony/AMD/IBM/Toshiba are working out the common basis of 65nm technology shared among them from separated 90nm technology. IBM can use this technology whenever they want, only when a customer pays for it. If a CPU for Xenon/Revolution doesn't require this technology to reach the designated spec MS/Nintendo don't have to use it as IBM requires an additional fee for it. If it's required for example from the POV of thermal design, then they have to pay for it which will turn out as a higher console price.

 

[jvd]

Well MS and Nintendo need a license if they make CPUs in TSMC/Charter/NEC/..., or have to pay for the premium fee for this technology if they ask IBM making CPUs / or in other words buy chips from IBM.

Yes , but if they are using an ibm cpu i see no reason why they would not have ibm produce i t.

IBM can use this technology whenever they want, only when a customer pays for it. If a CPU for Xenon/Revolution doesn't require this technology to reach the designated spec MS/Nintendo don't have to use it as IBM requires an additional fee for it. If it's required for example from the POV of thermal design, then they have to pay for it which will turn out as a higher console price.

First we don't know if ibm charges mroe for it. This may become standard with thier process offers .

 

[bigbud120]

I wonder if any future GPUs will use this tech.