360 - eDRAM now fabbed at TSMC

pipo

Veteran
For reference, the launch units had Samsung K4J52324QC-BC14 chips. According to the spec sheets, they are 90nm 512Mbit (64MB) chips operating at 1.8V.

It may be true, but there are no details in the news report, so it's kind of useless to speculate...
 
It's the eDRAM in Xenos. Apparently it's cheaper than using NEC.

http://money.cnn.com/news/newsfeeds/articles/prnewswire/AQW07915082007-1.htm
Microsoft Embraces TSMC 90nm Embedded DRAM Process for Xbox 360
PR Newswire
Production of 90nm Microsoft Graphics-Memory Subsystem Underway
August 15, 2007: 09:00 AM EST

HSINCHU, Taiwan, Aug. 15 /PRNewswire-FirstCall/ -- Taiwan Semiconductor Manufacturing Company, Ltd. today announced that Microsoft has started production of the Microsoft Xbox 360 graphics-memory subsystem using the TSMC 90nm embedded DRAM process. Designed to meet the needs of volume consumer electronics devices, the TSMC 90nm eDRAM process features a high-density macro design (80Mb) and fast performance to 500MHz.

"Microsoft's selection of the TSMC 90nm eDRAM process for the graphics-rich Xbox 360 is an important validation of the capability and maturity of the technology," said John Wei, senior director of Platform Marketing, Advanced Technology Division of TSMC. "Furthermore, the production marks the successful continuation to an ongoing collaboration between Microsoft and TSMC."

"TSMC provides the proven manufacturing and chip implementation services required to build a competitive silicon component in volume," said Bill Adamec, senior director of Semiconductor Technology of Microsoft. "The TSMC 90nm eDRAM process is exactly what we need to further strengthen our position in console gaming and entertainment."

TSMC has been in 90nm embedded DRAM production since the first quarter of 2006, and the design team has developed versatile sets of memory macros that are being used in more than a dozen 90nm customer products.
 
I thought the plan would have been to integrate the eDram onto the main die during the process shrink to .65u. Perhaps that proved to be too challenging and a cause for falcon systems not arriving sooner.
 
eDRAM processes lag behind - NEC's expertise in the matter is why they went to them in the first place. But as other fabs grow their skill in eDRAM, no reason for MS to remain at NEC prices.
 
eDRAM processes lag behind - NEC's expertise in the matter is why they went to them in the first place. But as other fabs grow their skill in eDRAM, no reason for MS to remain at NEC prices.

Would NEC's prices be that outlandish for 55nm versus TSMC's 90nm :?:
 
Would NEC's prices be that outlandish for 55nm versus TSMC's 90nm :?:

I think you mean 65nm yeah? But that aside, frankly I don't even know if NEC has 65nm up and running themselves for eDRAM (though I'm sure it's easily researched). I mean I fully expect for the Xenos and daughter-die to one day occupy the same silicon, but it's hard to predict exactly when. Maybe halfway through 65nm the eDRAM will catch up and they'll move to a unified die, or maybe it won't be until 45nm. BUT, considering TSMC's 90nm process vs NEC's, if it's matured enough to guarantee good yields, it should turn into another point of cost savings for MS. Maybe on the packaging front as well since both parts are under the same roof now. The reason why TSMC wasn't in the running at the start of 360's life is that they were still very much newbies on the eDRAM fab scene.

It'd be interesting to hear Dave B's take on when unification might happen; I would imagine him decently positioned to give a prediction.
 
I think you mean 65nm yeah?

55nm

:smile:

*snip for space*
It'd be interesting to hear Dave B's take on when unification might happen; I would imagine him decently positioned to give a prediction.


mmm... I guess it would depend on how well they shrink the two dice as you mentioned with the PS2 evolution in the other thread.

90 to 55 for the eDRAM would be hella tiny though. Perhaps when they get rid of that redundant shader array, they could try to fit in the eDRAM somehow to make it a rectangular die.

edit: I don't mean swap the two directly, some redesign would be needed. Know what I mean though? Things wouldn't be symmetrical with the fourth shader array gone. It's a long shot random thought. :oops:
 

Ah ha, indeed!

Well, probably just logistical savings then I guess, as well as long-term roadmap considerations. I don't know the expense of the 55nm process for a 10MB part, but yeah - 55nm should be plenty shrunk relative to 90nm, that's for certain.

Dave any personal thoughts on 'when' in terms of a unified die?

EDIT: I also changed the thread title for clarity's sake. Before I came in here I was expecting talk of memory modules!
 
Ah ha, indeed!

Well, probably just logistical savings then I guess, as well as long-term roadmap considerations. I don't know the expense of the 55nm process for a 10MB part, but yeah - 55nm should be plenty shrunk relative to 90nm, that's for certain.

Dave any personal thoughts on 'when' in terms of a unified die?

EDIT: I also changed the thread title for clarity's sake. Before I came in here I was expecting talk of memory modules!

Well if you read that 55nm article you'll see that its not in mass production yet, they only started producing engineering samples, its scheduled to be in production very late this year.

advanced_co_process_roadmap.gif
 
Back
Top