9800X3D releases Nov 7th, review embargo on Nov 6th

Scott_Arm said:
gigabyte x870 auros elite wifi 7. Computer store here is selling bundles with the cpu, ram and motherboard together. The ram is pretty basic, but essentially worked out to be free based on the bundle discount.
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Nice. X870 has pretty much everything I'd want in a platform. That wasn't the case with X670. It lacks the 16xPCIe5 connectivity which is something I would want in a computer that I'll keep for many years. The things that X870 loses vs X670 (less USB, SATA, PCIe lanes) don't really matter to me.

Also there have been rumors of some fairly high performing GPUs coming up that have only 8xPCIe5 connections. So PCIe5 might matter sooner than we think.
 
Yeah, I felt like the X870 made a lot of sense for a new PCIe 5 build. My B550 did everything I wanted back when I bought it, and honestly still continues to deliver even to this day in my Proxmox rig now.
 
Davros said:
They have pci-e 4.0 x16 which is the same bandwidth as pci-e 5.0 x8 there are no pci-e 5.0 graphics cards
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I read a while back that the 5070 would be PCIe5.0x8. Latest rumors say it's 5.0x16 but if some cards release in the future with only 8x PCIe I think it'd be best if those were PCIe5 lanes. 4.0x8 might cause some issues on say something like a 6060. This is one of the reasons I got a Z790 even with only a 13600K. I have an irrational fear of bottlenecks.
 
Got my 9800x3d today. Running everything at defaults. Haven't messed with memory at all. Seems pretty nice. Most games I'm gpu-limited still, but I actually hadn't thought about 1% lows, and they are better than my 5800x3d. My 5800x3d was on an old motherboard with memory that probably limited it a little. Only played poe2 and Fortnite and both felt a bit smoother and 1% lows look pretty good. But other than that won't be a huge difference until I get a new gpu. We'll see once I have it undervolted with tuned memory. Then maybe it'll feel really good.
 
Scott_Arm said:
Got my 9800x3d today. Running everything at defaults. Haven't messed with memory at all. Seems pretty nice. Most games I'm gpu-limited still, but I actually hadn't thought about 1% lows, and they are better than my 5800x3d. My 5800x3d was on an old motherboard with memory that probably limited it a little. Only played poe2 and Fortnite and both felt a bit smoother and 1% lows look pretty good. But other than that won't be a huge difference until I get a new gpu. We'll see once I have it undervolted with tuned memory. Then maybe it'll feel really good.
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You gonna get a 5080/5090 when they come out?
 
RobertR1 said:
Max out what you can to lower latency. It’ll mean more for lows than core boost.
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Yeah, agreed with this after about two weeks of tinkering. I'm back to air cooling for this generation, using a Noctua D15 with the dual 120mm fans. I've been using y-cruncher and Cinebench to estimate where my best performance comes from, and both single + multicore results always seem to favor memory at 3100 MHz CL30 (6200 Mt/s) with UCLK 1:1 and FCLK at 2066 and the CPU undervolted by 25mV on all cores. I can push a 100MHz overclock with a little less undervolt (only -20mV) however the temps step up by several degrees while benchmark results are within the run-to-run error variance of stock clocks. At a 200MHz overclock with -10MHz undervolt, any all-core benches run into the thermal limit at 95*c and the benches actually go down. Single CPU is finally measurably faster than stock, but only by just a few percent at best.

Memory :: UCLK :: FCLK is really where the performance is on these. If I really decided to overclock this puppy, I'd go custom water loop so I could de-lid the proc and use a direct-die waterblock. Otherwise I feel like you're fighting a losing battle with the thermals...
 
Nice! And yeah, max out fclk. Keep uclk/mclk as high are they’ll go in sync. Then tighten timings.

Annoyingly, fclk want less vsoc while uclk and mclk want more. So gotta find a sweet spot.
 
Yup.

Running the memory speeds beyond the IO die isn't much different than back in the days when people were doing the same with DDR and DDR2 speeds exceeding the northbridge FSB speeds. There are some corner cases where outright memory speed has benefits, but the most overall efficient mechanism was always a whole integer multiple of FSB (the modern equivalent being FCLK.) If you sit down to think about how the transmission pipeline works, it makes perfect sense: if the memory is going faster than FCLK, then the IO die is left to buffer filled requests from memory until the next FCLK signal can come around to transmit it.

I've always wondered, but never found a good source, what kind of tiny caches and/or buffers exist in the IO die (like the northbridges before them)? Something must exist there to hold the data from memory until the main bus can transmit it... Which means, if those buffers fill, it must create some sort of stall condition. I wonder if there's a way to manufacture a test to create such a stall condition in order to guesstimate however much buffer / cache exists there?
 
Albuquerque said:
Yup.

Running the memory speeds beyond the IO die isn't much different than back in the days when people were doing the same with DDR and DDR2 speeds exceeding the northbridge FSB speeds. There are some corner cases where outright memory speed has benefits, but the most overall efficient mechanism was always a whole integer multiple of FSB (the modern equivalent being FCLK.) If you sit down to think about how the transmission pipeline works, it makes perfect sense: if the memory is going faster than FCLK, then the IO die is left to buffer filled requests from memory until the next FCLK signal can come around to transmit it.

I've always wondered, but never found a good source, what kind of tiny caches and/or buffers exist in the IO die (like the northbridges before them)? Something must exist there to hold the data from memory until the main bus can transmit it... Which means, if those buffers fill, it must create some sort of stall condition. I wonder if there's a way to manufacture a test to create such a stall condition in order to guesstimate however much buffer / cache exists there?
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I'm confused. What is the difference between FCLK, UCLK, and infinity fabric frequency? What is the optimal memory speed for Ryzen 7000 and 9000?
 
homerdog said:
I'm confused. What is the difference between FCLK, UCLK, and infinity fabric frequency? What is the optimal memory speed for Ryzen 7000 and 9000?
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FCLK is the infinity fabric clock. It's the frequency of the bus between the cores and the memory interface. MCLK is the actual memory clock speed. UCLK is the "uncore" clock (I think that's the correct term) or the clock of the memory interface, not the clock of the memory or the cpu cores. You want to keep MCLK and UCLK 1:1, assuming you're not chasing DDR5-8000. In the case of 8000, you want 2:1 MCLK:UCLK because you would never be able to hit 4000 UCLK. I think in 2:1 mode the infinity fabric is synchronized with UCLK, so if UCLK is 2000 then FCLK has to be 2000, which is not the case in 1:1 mode.

The buildzoid video above that I linked is a good explainer of what the clocks are and what good target fclk is for each. It seems like 3:2 UCLK:FCLK is a good ratio and if you want to push FCLK even higher it'll probably have to be 100MHz higher to get any real benefit.

So for:
DDR5-6000 - 3000:3000:2000 MCLK:UCLK:FCLK, or 3000:3000:2100
DDR5-6200 - 3100:3100:2066 MCLK:UCLK:FCLK, or 3100:3100:2166 (fclk 2166 is not necessarily going to work)
DDR5-6400 - 3200:3200:2133 MCLK:UCLK:FCLK or 3200:3200:2233 (fclk 2233 is pretty rare, so 2133 is a better target)
DDR5-7x00 - these are not really worth it because UCLK is less than 2000, which will increase latency over just going with 6x00 speeds
DDR5-8000 - 4000:2000:2000 MCLK:UCLK:FCLK ... no alternative for FCLK here that won't kill latency
DDR5-8200 - 4100:2050(?):2050(?) MCLK:UCLK:FCLK ... no alternative for FCLK here that won't kill latency
DDR5-8400 - you're dreaming

DDR5-6400 is not easy to hit, because 3200 UCLK is not necessarily going to work for your CPU. DDR5-6000 should be rock solid with a DDR5-6000 kit for Ryzen. 6200 is maybe the sweet spot overclock that should be achievable with a good 6000 memory kit.

MCLK is easy at 3000, 3100, 3200. At 4000 you start hitting MCLK issues and motherboard quality matters a lot.
UCLK gets unstable at 3200. UCLK requires increasing Vsoc.
FCLK is probably stable up to 2100 (usually) and seems to not like high Vsoc.

UCLK is more important than FCLK. So it's better to try for say DDR5-6200 with 2066 FCLK than DDR5-6000 with 2100 FCLK.

Seems like the order is MCLK:UCLK with FCLK at 3:2 ratio to UCLK. Get that stable. Tighten memory timings. Make sure that's stable. Try for FCLK at +100 MHz (likely won't work over 2200) and get that stable, or fall back to 3:2. Then undervolt/overclock cpu cores. And do final stability.
 
Scott_Arm said:
FCLK is the infinity fabric clock. It's the frequency of the bus between the cores and the memory interface. MCLK is the actual memory clock speed. UCLK is the "uncore" clock (I think that's the correct term) or the clock of the memory interface, not the clock of the memory or the cpu cores. You want to keep MCLK and UCLK 1:1, assuming you're not chasing DDR5-8000. In the case of 8000, you want 2:1 MCLK:UCLK because you would never be able to hit 4000 UCLK. I think in 2:1 mode the infinity fabric is synchronized with UCLK, so if UCLK is 2000 then FCLK has to be 2000, which is not the case in 1:1 mode.

The buildzoid video above that I linked is a good explainer of what the clocks are and what good target fclk is for each. It seems like 3:2 UCLK:FCLK is a good ratio and if you want to push FCLK even higher it'll probably have to be 100MHz higher to get any real benefit.

So for:
DDR5-6000 - 3000:3000:2000 MCLK:UCLK:FCLK, or 3000:3000:2100
DDR5-6200 - 3100:3100:2066 MCLK:UCLK:FCLK, or 3100:3100:2166 (fclk 2166 is not necessarily going to work)
DDR5-6400 - 3200:3200:2133 MCLK:UCLK:FCLK or 3200:3200:2233 (fclk 2233 is pretty rare, so 2133 is a better target)
DDR5-7x00 - these are not really worth it because UCLK is less than 2000, which will increase latency over just going with 6x00 speeds
DDR5-8000 - 4000:2000:2000 MCLK:UCLK:FCLK ... no alternative for FCLK here that won't kill latency
DDR5-8200 - 4100:2050(?):2050(?) MCLK:UCLK:FCLK ... no alternative for FCLK here that won't kill latency
DDR5-8400 - you're dreaming

DDR5-6400 is not easy to hit, because 3200 UCLK is not necessarily going to work for your CPU. DDR5-6000 should be rock solid with a DDR5-6000 kit for Ryzen. 6200 is maybe the sweet spot overclock that should be achievable with a good 6000 memory kit.

MCLK is easy at 3000, 3100, 3200. At 4000 you start hitting MCLK issues and motherboard quality matters a lot.
UCLK gets unstable at 3200. UCLK requires increasing Vsoc.
FCLK is probably stable up to 2100 (usually) and seems to not like high Vsoc.

UCLK is more important than FCLK. So it's better to try for say DDR5-6200 with 2066 FCLK than DDR5-6000 with 2100 FCLK.

Seems like the order is MCLK:UCLK with FCLK at 3:2 ratio to UCLK. Get that stable. Tighten memory timings. Make sure that's stable. Try for FCLK at +100 MHz (likely won't work over 2200) and get that stable, or fall back to 3:2. Then undervolt/overclock cpu cores. And do final stability.
Click to expand...
So DDR5-6000 is still the reasonable sweet spot? It's cheap and easy to hit? Doesn't seem like the gaming gains beyond that would be very noticeable to a human. Though I definitely understand the desire to max it out.
 
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