There's only so many choices for an MCM. In this case, there's 4 chips on a substrate and only so many things that can be done to hook them up.For relax a bit the atmosphere,if the conceptt is different, i have find funny some similarity between both design ... even more when i remember the exascale system presented by AMD some times ago ( who will more related to MCM ). OFC AMD was not directly propose a MCM chips, but i retain that MCM can allow thi on paper )
In this case, AMD's EPYC slide is actually misleading. Nvidia's concept has a mesh or ring on-package, whereas Naples is described as being fully-connected within a socket.
Nvidia's package signalling appears to be 4x as power-efficient as AMD's and with much higher bandwidth.
The AMD HPC concept differs in that it relies heavily on active interposers and includes CPU chiplets. It's not clear if how heavily Nvidia relies on an interposer, whether silicon or organic. It does not appear to be active, at any rate.
The less aggressive integration and more defined power and process numbers may also point at Nvidia's scheme being nearer-term, as in the next generation or the one after.
AMD's timeline and architectural basis is unclear, and might be post-Navi--which itself comes after a Vega refresh.