So that 520-630GFLOPS would be just an estimate and not a product range...
NVIDIA Fermi: Architecture discussion
- Thread starter Rys
- Start date
So that 520-630GFLOPS would be just an estimate and not a product range...
So nVidia is charging $1500 for 3GB of memory?
Edit: the product guide pdf does NOT say "FLoating Performance Range" but separates Peak values with a dash. According to that Doc, Win7 is also not supported.
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Doesn't their Q1 end at the end of April?
***edit:
http://www.facebook.com/NVIDIA?ref=nf
8xMSAA+24xCSAA? If my speculation should be on track, 8xMSAA performance needs to be quite a bit higher for it to make sense.
http://www.facebook.com/NVIDIA?ref=mf
That's right. Expect != Speculate
LordEC911 said:
What leads you to question if A3 will be the final silicon ?
It seems to me that rjc's 416 ALUs for Tesla C2050 seems to be spot on, given the specs.
Doubtful that NVIDIA made that kind of mistake on a document that is viewed by potential customers.
jimmyjames123 said:
He actually said it in so many words
I do have doubts though, that Rys's 1700 Mhz speculation for the ALUs is correct. I'm still thinking of 1500 Mhz. 1700 Mhz seems more likely for a "refresh" product.
That should be expected right ? Their AA performance wasn't stellar when compared to RV770, so it should be expected that they improved it, in their brand new architecture.
Yep, but if A3 yields are poor at 1400Mhz, what are the odds that we see Rys' 1700Mhz prediction on Geforce parts?
Jawed
Legend
1400MHz yields might only be poor for the voltage/power level that NVidia is targetting for Tesla? Geforce has room to breathe in this respect, particularly if the board only has 1.5GB of memory.
Jawed
Poor for 225W? Then how much breathing room do GeForces have? Do you expect the GeForce GTX 380 —or whatever it's called— to have an even higher TDP?
Blazkowicz
Legend
at least that was an estimate in the beginning.
but now I won't put my hand to the fire on that.
I hope there's sparse grid supersampling (I wonder if DX10.1 or DX11 compliance implies it by the way).
I'm an AA nut yet I can't see much the difference between 4x MSAA and the MSAA + CSAA modes. but I sure wish to see supersampling, pure or mixed. Maybe that's a new, better 32xS mode
Jawed
Legend
The TDP for a Tesla with 6GB of memory has to be pretty strictly adhered to. The wishy-washy TDP of a Geforce with only 1.5GB of memory will be much less of a constraint. 300W is an option for a consumer card, isn't it?
So I expect higher clocks for Geforce, though there may well be a only benchmark edition with the full ALU count and top clocks. Whether they're high enough for the halo effect is a whole different question.
Jawed
These are not computer games we are talking about. I think people over estimate how much large businesses/academic institutions will care about CUDA vs. openCL
Blazkowicz
Legend
there's still blur but with the sparse sampling it's more worth it.
most noticeable on small text, I lived with it when playing the old counterstrike but you probably wouldn't want it in some RPG, RTS, simulation etc. games.
LOD adjustment gives you sharper textures, so you get to both gain and lose detail.
you would be able to selectively enable it with nHancer (that program is the number one reason I stick to nvidia)
Groo The Wanderer
Regular
No, but I am a little down about it. I do understand why it isn't a big deal, I asked at the Evergreen launch (two days before actually), and the memory controller designers told me why it wasn't a problem. I agree with what they said.
In Cypress, memory bandwidth is the most easily reached bottleneck, but for a normal to slightly overclocked card, it shouldn't be a problem.
-Charlie
Groo The Wanderer
Regular
will OpenCL support Fermi features? (pointers, memory hierarchy and what not)
for HPC I believe OpenCL doesn't matter much, any code will be custom and OpenCL code would need to be rewritten anyway if ran on another architecture. we don't hear of Radeons in 1U racks or ECC memory either.
I believe it will matter more in the consumer space, especially with AMD Fusion. Maybe we'll even see code running on the sandy bridge IGP, even if reluctantly
OpenCL will be a good starting point to flesh out an HPC program with, then customize it from there.
-Charlie
Groo The Wanderer
Regular
Groo The Wanderer
Regular
If they have to disable another unit for the C2050, that means one of two things. Either defects are massive, or power is barely making the 225W cut/leakage is bad bad bad. Given they were trying to make a 1500MHz shader part (I got those numbers last spring when I was first briefed on the chip), the fact that they are having trouble binning more than 12-1300 is pretty telling.
-Charlie
Groo The Wanderer
Regular
They also said it would launch in 2009, but hey, I never believed that, especially since they were telling people March at the same conference if they signed the right NDAs.
I think they have to launch with A3s, mainly because the problems they need to fix, power, clocks and memory controller issues, are likely to require a full respin, not just metal layer. If they need to do that, it won't be Q1, most likely won't be Q2, and then you have to wonder if they will bother at all?
I am not sure Fermi would make a dandy Windows 8 part.
-Charlie
I don't think they meant financial Q1, so by the end of March is how I took it.
Correct, but they have similar connotations...
Due to the info coming out about bad bins due to leakage, low clocks, disabled parts, high power consumption. If things were really as bad as it seems, I was wondering if they would try A4 though it was answered below.
They also said it would launch in 2009, but hey, I never believed that, especially since they were telling people March at the same conference if they signed the right NDAs.
I think they have to launch with A3s, mainly because the problems they need to fix, power, clocks and memory controller issues, are likely to require a full respin, not just metal layer. If they need to do that, it won't be Q1, most likely won't be Q2, and then you have to wonder if they will bother at all?
I am not sure Fermi would make a dandy Windows 8 part.
-Charlie
Good point. So another G200/G200b cycle.
Get GF100 parts out and work on getting GF100b, hopefully doesn't need 2 respins, out as fast as possible which best case is Q3/Q4 '10.
Would 28nm even be a possibility at TSMC in that timeframe? I know GF is expected to have limited 28nm production before the end of '10 but haven't really heard much from TSMC on the same subject.
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