Saw this in another thread at B3D - not sure if it's been posted to the console forum yet.
http://www.beyond3d.com/forum/viewtopic.php?t=11883
http://www.beyond3d.com/forum/viewtopic.php?t=11883
Xenon System Block Diagram
- Thread starter casper
- Start date
Megadrive1988
Veteran
10 MB eDRAM
that would just be enough IMHO.
and perhaps this is for an eariler revision of Xbox 2. the final Xbox 2 might contain more, I would think. but perhaps not.
notice the VPUs as part of each CPU. I wonder what that is. perhaps AltiVec as someone mentioned in the GAF thread.
I also hope the graphics processor will be more than 16 pipelines @ 500 Mhz
either 16 pipes at 650~700 Mhz, or 32 pipelines at 500 Mhz.
I would think that R500 and R600 will have more than 16 pipes, R420 is already there.
that would just be enough IMHO.
and perhaps this is for an eariler revision of Xbox 2. the final Xbox 2 might contain more, I would think. but perhaps not.
notice the VPUs as part of each CPU. I wonder what that is. perhaps AltiVec as someone mentioned in the GAF thread.
I also hope the graphics processor will be more than 16 pipelines @ 500 Mhz
either 16 pipes at 650~700 Mhz, or 32 pipelines at 500 Mhz.
I would think that R500 and R600 will have more than 16 pipes, R420 is already there.
DeathKnight
Regular
Something I find a bit odd is the speed of the northbridge to southbridge bus. It's only a 200MB/s improvement over the Xbox's Hypertransport bus. I'm not a hardware designer though, so I guess that's all that's needed.
Given ATI's previous parts they are also likely to be co-issue capable as well.
Aww... now you spoiled it... you were first supposed to point out that 192>180, then I could go into a long explanation how "PS3 flops are actually much lower effective" and add a further rebuttal how I underestimated the XBX2 numbers to begin with.ERP said:
Actually if I was true to Deadmeat's spirit, I'd be starting a new thread right now like so...
Deadmeat said:
Releasing this in mid 2005 might play out well for ms. This part seems quite able to deliver 20-50 instruction shaders on every pixel with nice aa/as at those low resolutions. You'd probably need a lot more arithmetic "horsepower" to deliver an additional 'equally large' generational advance in percieved graphics quality on standard tvs after that.
XNA is to control cost and they speaked about hdtv hi-rez costs.
Those architecture talk about a HD ( m-system?)?
Other question , will this be capable of DirectxNext ?
Forget ... http://news.teamxbox.com/xbox/5728/Xbox-2-Hardware-Architecture-Revealed
Those architecture talk about a HD ( m-system?)?
Other question , will this be capable of DirectxNext ?
Forget ... http://news.teamxbox.com/xbox/5728/Xbox-2-Hardware-Architecture-Revealed
Panajev2001a
Veteran
DaveBaumann said:
What do you mean in this case ? A scalar ALU inside each Shader ?
Possible.
So, factoring in single-cycle Vector and Scalar MADDs, we get:
48 Shader ALU ops = 24 Shader ALUs * ( 1 Vec4 op + 1 Scalar op ).
24 * ( 8 ops + 2 ops ) * 0.5 GHz = 120 GFLOPS.
3 cpus * 3.5 GHz * 8Flops/cycle (1 VPU) = 84 GFLOPS.
A total of 204 GFLOPS.
Now, the comments about "a reasonable fraction of 1 TFLOOPS in Xbox 2 in 2005, so why getting closer to 1 TFLOPS for a 2006 machine like PlayStation 3would be impossible to think about ?" like some people here, that know something that not everyone knows, make sense
.PiNkY said:
Hm, I don't see it as THAT surprising really. It's probably going to simplify the design of the hardware; IBM can copy & paste code for the G5 bus interface and ATi can copy & paste code for PCIe interface into their respective custom CPUs and GPUs. Then whomever is making the northbridge (likely IBM) makes the receiving end of the CPU interface and a generic PCIe controller for the GPU and south bridge chips (looks like a PCIe 2x link, but I'm not sure). Both the G5 CPU and PCIe interfaces are (very) high bandwidth and full duplex, and will likely not be any kind of bottleneck...
Panajev2001a
Veteran
Laa-Yosh said:
MSAA ?
720p ?
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