Sorry, perhaps I should've said "single-cycle execution"...
Also I'm getting the impression that you're in a real x86 implementation logger right now... Most of the little RISC designs you see in consoles have REALLY shallow FPUs... Hell the Power4/970 (and I guess now Power5) is the exception not the rule for PowerPC)...
Also I'm getting the impression that you're in a real x86 implementation logger right now... Most of the little RISC designs you see in consoles have REALLY shallow FPUs... Hell the Power4/970 (and I guess now Power5) is the exception not the rule for PowerPC)...