Wii U hardware discussion and investigation *rename

[function]

So the new chipworks annotations say that the big eDRAM array is slower and less dense.. is that really how this works? I figured you'd be trading density for speed, not getting both. Why use the less dense version then? Lower power consumption?

If the top eDRAM is used primarily for Wii BC it shouldn't need to be nearly as fast. I wonder if the annotation accidentally switched this.

The big edram block has 16,384 individual elements meaning each one must be 2KB.

I don't know how that relates to your post, but I needed to put it somewhere after I've gone to the trouble of counting them.

Edit: the small edram block above the big one has 4096 individual elements.

 

[function]

Llano's IGP "splices" two 4-way SIMDs into one 8-way block, the same does Trinity. That's why the register bank count is doubled.

Current speculation (in this thread anyway) suggests that the Wii U also has 8 SIMDs per block too, so what would the reason for it having half the number of register banks?

 

[shinobi]

I know the thoughts here was wiiu was on par with current gen, have thought's changed after seeing the GPU pic, is it 1.5x current gen or do the bottle necks still hold it back.

 

[Shifty Geezer]

So an important plot-point we've missed thus far is 2+1 MBs of fast eDRAM. May well be fast for the draw operations but it's also tiny, so I'm guessing tile rendering is a necessity?

 

[TheLump]

This is the first time I've even read the forum so my opinions are all formed from today alone.. take that as you will. I won't bother to post it, but I can count about 11 posts in the die shot thread alone supporting a GPU advantage due to fixed function hardware (and mainly if not entirely from different posters). I'm not saying a majority of the forum is doing it but it's a lot of people.

Ok maybe so. I could have missed a lot of them. Not worth laughing off the whole GAF thread though imo, there's some great info coming out of there (in between the silliness!)

If only I were smart enough to understand it all. Alas I will retreat to my lurking chambers once more.

 

[shinobi]

So an important plot-point we've missed thus far is 2+1 MBs of fast eDRAM. May well be fast for the draw operations but it's also tiny, so I'm guessing tile rendering is a necessity?

There saying it's 1mb sram on neogaf.

 

[(((interference)))]

Thanks Fourth Storm and Chipworks.

So we know it's 350 GFLOPS and 320 shaders?

 

[function]

Probably. The die sizes work out anyway. But I still think there are a couple of things about the GPU that don't quite make sense.

 

[shinobi]

Probably. The die sizes work out anyway. But I still think there are a couple of things about the GPU that don't quite make sense.

so it could more flops or less, i don't want you eating your hat now

 

[function]

The hat eating was only for above 400 shaders!

My guess was 320 with the possibility of less. If I buy a hat it'll be for wearing.

But there are still some things about the chip that seem funny. I'll probably pose some kind of incredible hypothesis tomorrow when I'm less tired...

 

[function]

wsippel, are you around?

Renesas do have a 4MB edram macro, it's just that it's for 55nm ...

 

[shinobi]

The hat eating was only for above 400 shaders!

My guess was 320 with the possibility of less. If I buy a hat it'll be for wearing.

But there are still some things about the chip that seem funny. I'll probably pose some kind of incredible hypothesis tomorrow when I'm less tired...

will it be a positive or negative hypothesis?

 

[fellix]

The small memory array atop the 32MB EDRAM is probably 4MB (16 banks * 256KB) and despite the the quarter size of a single RAM cell, the row decoder and amplifier structures are similar between both arrays.

Current speculation (in this thread anyway) suggests that the Wii U also has 8 SIMDs per block too, so what would the reason for it having half the number of register banks?

Without scaling the register file size, that would reduce the number of concurrent threads running in the multiprocessor and will diminish the benefits of the doubled SIMD lanes.

 

[function]

will it be a positive or negative hypothesis?

It's too early to say!

 

[Gipsel]

Current speculation (in this thread anyway) suggests that the Wii U also has 8 SIMDs per block too, so what would the reason for it having half the number of register banks?

Without scaling the register file size, that would reduce the number of concurrent threads running in the multiprocessor and will diminish the benefits of the doubled SIMD lanes.

Each visible SRAM array in the SIMD blocks is just twice as large as the ones of Llano. It's the same number of arrays as Brazos uses (32 arrays, 4 kB each). For the 32nm Llano AMD probably split each bank in two parts to be able to position it more fine grained, circumvent some access latency issues caused by the different process or whatever (maybe it was just the most convenient way to get the SRAM macro to work as intended). The total size is always the same: 16 kB per VLIW5, i.e. 128kB in such a half SIMD sized block (80 SPs for VLIW5) all newer layout variants appear to use, or 256 kB for a full sized SIMD.

 

[mboeller]

could the additional eDRAM be used for the Tablet controller?

The amount of eDRAM could be enough for 3 x 854x480x32bit

 

[function]

I was thinking that the smaller, probably faster block of edram might have another role to play.

If it's 4 MB then that'd be enough for Z at 1280 x 720. This would free up BW in the large edram pool for colour. If a game can't fit it's Z buffer in the smaller, faster chunk of edram then without tiling it'd have to go in the larger pool and contend for BW. This might explain why a game like BLOPs 2 with it's MSAA runs so badly on the Wii U whenever there's a sniff of transparency.

We still need to understand why the Wii U has foliage cut out of games like Darksiders 2 and Tekken, and why BLOPs chokes on transparency. Slow edram for colour still seems like the most likely scenario.

 

[shinobi]

I was thinking that the smaller, probably faster block of edram might have another role to play.

If it's 4 MB then that'd be enough for Z at 1280 x 720. This would free up BW in the large edram pool for colour. If a game can't fit it's Z buffer in the smaller, faster chunk of edram then without tiling it'd have to go in the larger pool and contend for BW. This might explain why a game like BLOPs 2 with it's MSAA runs so badly on the Wii U whenever there's a sniff of transparency.

We still need to understand why the Wii U has foliage cut out of games like Darksiders 2 and Tekken, and why BLOPs chokes on transparency. Slow edram for colour still seems like the most likely scenario.

so with 352 gflops, bandwidth and cpu bottle necks, is it weaker or stronger then current gen, your opinion would be welcomed.

 

[Inuhanyou]

^ Stop asking when people are still deciphering the information, they heard you the first time.

Either way, it would not be a certain regardless. The Wii U does some things better than the 360 and PS3, and it does some things worse, its not a straight up or down situation.

The main bandwidth is slower, EDRAM is in higher quantity but slower, GPU is 50% more powerful give or take a few percentage points, CPU is marginally weaker.

 

[function]

My opinion - for whatever it's worth - is that there is no black and white answer. What most of us here suspected for a long time is still probably the case, and that is that it's weaker in some ways and stronger in others.

Going by analysis of the early games and going by the die sizes and processes and power consumption and clocks it seemed that the Wii U had more "shader power", less "CPU power" and that there was some issue that was limiting effective fillrate, particularly when transparency was involved. And I think all of that still stands.

If I had to give an opinion it would be that the Wii U is about on par with current systems, give or take, and that it'd really struggle with next gen ports even at half the resolution and and/or half the frame rate.