What are the chances PS3 will have two separate CELLs?

[Jawed]

Manufacturing with a power of 2 # of SPEs doesn't mean we'll get a power of 2 number of SPEs.

I'd like to know the logic behind manufacturing chip 20% larger then necessary and then keeping those extra transistors disabled.
The PS3 isn't some low-budget/low-volume offshot of main Cell production like 386SX was for 386...

Moreover we're talking about a console, not some PC workstation.
And unless I'm terribly mistaken - disabling 2 random SPUs on a ring bus would have random effects on internal bus latencies.
That's akin to having CPU document stating stuff like "MADD latency is 4-8cycles, randomly changing from one CPU to the next". :?

But latency on a ring is indeterminate anyway - it depends on how many hops it is to the correspondent node. All a ring does is guarantee a maximum latency. The Element Interconnect Bus (EIB) contains four rings, with two pairs of contra-rotating tokens. Maximum latency is therefore half-way around the EIB.

Also you miss the point of Cell, which is that any combination of SPEs can talk to each other in pairs, pipelines or groups, etc. Cell is all about creating dynamic combinations of computing blocks, where the memory each SPE has is partitioned into shared and private areas in order to support the sharing of workload between groups of SPEs. Different code will result in different combinations, and multiple programs will co-exist.

Jawed

 

[McFly]

Can someone define 'power of 2'?

2^x --> 2,4,8,16,32,64,128,256,512,1024,2048 ...

Fredi

Thanks...that's how I read it too...though 2048 SPE's is pushing it!

That would not get many chips on one wafer at 90nm.

Fredi

 

[Shifty Geezer]

Huh?

Are you talking to me? I wasn't replying to anyone in particular here...just making a 'play' on the word 'power'....some of you guys need to chill...

I was replying to PC-Engine's remarks. You just type too fast so it looks like I was replying to you

 

[Titanio]

I'd like to know the logic behind manufacturing chip 20% larger then necessary and then keeping those extra transistors disabled.

Volumes? Sony will need lots of PS3s, fast. Getting enough chips with 8 SPEs working at whatever clockspeed they're aiming for might be tricky..

Moreover we're talking about a console, not some PC workstation. And unless I'm terribly mistaken - disabling 2 random SPUs on a ring bus would have random effects on internal bus latencies.
That's akin to having CPU document stating stuff like "MADD latency is 4-8cycles, randomly changing from one CPU to the next". :?

This is a good point, but I feel insufficiently familiar with the architecture to say whether it'd be (much) of a problem or not. Jawed seems to think not, but I'd be interested to hear if you disagree or not..

 

[Fafalada]

But latency on a ring is indeterminate anyway

Not if I run the same application under the same conditions.

 

[overclocked]

Im pretty sure they go with the Cell chip we know of, aka 1PPE/8SPE.
The die of this chip is app what the EE had when launching PS2.
However what the Ghz are maybe 3-4Ghz and the nVidia GPU again made 90nmSOI will be clocked at 500-700Mhz.

 

[MechanizedDeath]

If it's 65nm, can't they do it? I mean, the xCPU is supposed to be a big chip too, right? I don't know how MS could get a chip with a big die on the cheap, but Sony couldn't do the same eventhough they're making it themselves. I'd think economies of scale would work much faster for them. I'm still hoping for a 1-8 Cell @ 65nm & 4GHz. But it would be great if they went with two of 'em too. PEACE.

 

[Nite_Hawk]

If it's 65nm, can't they do it? I mean, the xCPU is supposed to be a big chip too, right? I don't know how MS could get a chip with a big die on the cheap, but Sony couldn't do the same eventhough they're making it themselves. I'd think economies of scale would work much faster for them. I'm still hoping for a 1-8 Cell @ 65nm & 4GHz. But it would be great if they went with two of 'em too. PEACE.

Sounds like 65nm is out, atleast for the near term. Perhaps they will end up doing a MKII design or something that is built on 65nm. I doubt they would do it for release though unless they make some amazing progress on 65nm very soon.

Nite_Hawk

 

[Megadrive1988]

Ken K. ruled out 6 SPEs, he seems to be unwilling to accept less than 8. also, I think it will run at 4 or 4+ GHz.
it is the max 5.6 GHz that we wont see in PS3.


edit: and with PS3, no I am not ruling out two Cell Processing Elements with a total of 16 SPEs and 2 PPEs.
(that's like 1/2 of a Broadband Engine from the patent ) even though Im not really expecting that.



on another note, man I cannot wait for PS4 with hundreds of SPE-2s, GBs of RAM, TFlops of fp performace, a terapixel of fillrate, 1 trillion raw polygons, 100 billion fully featured polygons, and current-gen game CGI intro graphics

 

[Megadrive1988]

2 is a power of 2. Cell with 2 SPEs!!!1!1

and then the Xenon CPU with 3 cores would stomp on a 2 SPE Cell

that would be 3 cores vs 3 cores and Xenon CPU would be more able to do general purpose computing. and roughly equal FP performance / media processing.

 

[BOOMEXPLODE]

Cell won't be THAT big (221mm² for the 90nm 8 SPE version). NV45 is already 287mm² and the original Emotion Engine was 240mm². It just goes to show that a >200mm² chip is not at all outside the realm of possibility. Anyway I think it's much more likely that they would scale back the clock speed a bit than design a new 4 or 6 SPE version of Cell (why go to the expense of designing an 8 SPE version if they're not going to use it?).

 

[MechanizedDeath]

Sounds like 65nm is out, atleast for the near term. Perhaps they will end up doing a MKII design or something that is built on 65nm. I doubt they would do it for release though unless they make some amazing progress on 65nm very soon.

Nite_Hawk

I still can't wrap my head about this 65nm thing. How far behind are they that they'll actually do a Cell production run (million of chips) on 90nm (next year) when they've supposedly been producing 65nm samples already. Besides the problem with splitting production capacity between PSTwo, PSP and PS3, they also have the heat issues at 90nm. I know KK had that interview, but he isn't exactly STI, nor was he definitive about what process would be used. Cell was hyped as a 65/45nm product. I have a hard time believing that they're gonna launch with it at 90nm, and then convert to 65nm later on down the road. Seems like costs of cooling solutions (if clocked at 4GHz, will it need a fansink?) and sloppy yields (larger die means fewer chips per wafer) would be less attractive than poor yields but the ability to quickly recoup losses through economies of scale due to a chip with nearly half the die space. Is this just wishful thinking on my part? PEACE.

 

[Carl B]

All chips start at a certain process - not the process they end their lives at. If you look at the PS2 chip right now, it's a both a EE and a GS on a single chip @ 90nm. But it started out two seperate chips, each at 180nm. If Kutagari has to launch at 90nm with pathetic yields until they get 65nm underway, I have no doubt that's what he'll do. It's true he himself is not STI, but I am pretty sure among the executives within that group, he has to be near the absolute top in keeping informed, since he actually is an engineer himself and the Cell project is very near and dear to his heart. I see Cell at 45nm, and possibly even below, before it's life is played out inside the PS3. But at launch, I would be very very surprised if they managed 65nm.

 

[V3]

Cell was hyped as a 65/45nm product.

When it was first announced, IBM said Cell was going to use 100nm part, later to be 90nm. That was their intended target from the very start. It wasn't a 65nm/45nm design. There will be revision of Cell at 65/45nm design no doubt, but the first ones was targeted for 90nm design.

 

[overclocked]

I actually think that its smarter to lauch on a mature process if the chipsize seem ok, and it does.
Cell nearly identical in size to the original EE and say the nVidia GPU will have 400m transistors that would still make it smaller than the first GS in terms of size.

 

[Megadrive1988]

Sounds like 65nm is out, atleast for the near term. Perhaps they will end up doing a MKII design or something that is built on 65nm. I doubt they would do it for release though unless they make some amazing progress on 65nm very soon.

Nite_Hawk

I still can't wrap my head about this 65nm thing. How far behind are they that they'll actually do a Cell production run (million of chips) on 90nm (next year) when they've supposedly been producing 65nm samples already. Besides the problem with splitting production capacity between PSTwo, PSP and PS3, they also have the heat issues at 90nm. I know KK had that interview, but he isn't exactly STI, nor was he definitive about what process would be used. Cell was hyped as a 65/45nm product. I have a hard time believing that they're gonna launch with it at 90nm, and then convert to 65nm later on down the road. Seems like costs of cooling solutions (if clocked at 4GHz, will it need a fansink?) and sloppy yields (larger die means fewer chips per wafer) would be less attractive than poor yields but the ability to quickly recoup losses through economies of scale due to a chip with nearly half the die space. Is this just wishful thinking on my part? PEACE.

I completely agree with you, even inspite of that KK interview.

 

[jvd]

when they've supposedly been producing 65nm samples already.

Sampling and mass production are two diffrent things . 65nm might be ready in limited runs by the end of the year but if they are launching by march in japan they will need to have alot more than a limited production run by december to get enough systems for a japan launch .


Aside from that you really don't know how well production has been going. They could have a ton of troubles they haven't announced . If intel is only switching to 65nm (and who knows in what volume ) by the end of the year i don't see sony being ahead of them or even on par with them .

 

[a688]

Cell won't be THAT big (221mm² for the 90nm 8 SPE version). NV45 is already 287mm² and the original Emotion Engine was 240mm². It just goes to show that a >200mm² chip is not at all outside the realm of possibility. Anyway I think it's much more likely that they would scale back the clock speed a bit than design a new 4 or 6 SPE version of Cell (why go to the expense of designing an 8 SPE version if they're not going to use it?).

You have to realize what process they are on. The EE isn't that big on 90nm. Also, I believe that NV45 is on 130nm. Cell is a big chip. Also, they don't have to go w/ a 1 by 8 chip. It was designed to show what they could do. Just because they CAN do it won't mean they will.

 

[jpr27]

There has been alot of talk about PS3 having 256 XDRam but I do think that if Xbox 2 does have 512Mb of Ram DDR etc I think Sony will have no choice but to bite the bullet and up its ram to compete.

Most "casual" gamers and consumers usually do play the numbers game and whether its more games or better specs (i.e. More Mhz, Ram, CPU, etc.), most go with the higher numbers. Even if they dont know what the final result might be.

Although Sony does have a comfortable fan base now I just dont think they will sit by and let M$ have 512Mb of Ram and stick with 256Mb of XDR. They should know (least I hope they would) that although they have a fanbase now that could change if they dont compete on all levels.
Look at Nintendo and Sega before the PS One. Fanbase or no fanbase people strive for the best games, best graphics etc.

***Again this is just speculation on IF the Xbox 2 has a rumored 512MB of DDR. ***

 

[one]

You have to realize what process they are on. The EE isn't that big on 90nm. Also, I believe that NV45 is on 130nm. Cell is a big chip. Also, they don't have to go w/ a 1 by 8 chip. It was designed to show what they could do. Just because they CAN do it won't mean they will.

What does it matter? They actually manufactured 240mm2 EE and even bigger GS back in 2000.