Unified and diversified shading

[DeanoC]

I'm also wondering how many ALUs slots go wasted when you're doing 1,2,3 components ops and at the same time another op can't be co-issued.
Obviously it's not going to happen but it would be nice to push 'diversification' even further and to have only scalar ALUs..

3DLabs vertex processor does this IIRC Instead of banks of 4 component ALUs, it has bucket loads of scalar ALUs that are simple used in multiple of 4 usually.

 

[Simon F]

Anyway, as far as I can tell, the IHV optimisation guys like to reinforce the message of masking your instructions (e.g. .rg) at every possible opportunity so that must be to maximise co-issuability in the pipeline.
Jawed

It may also be to give the compiler more opportunity to reorder instructions and possibly to reduce write-read dependencies in the hardware.

 

[KimB]

ATI may not be able to do 2+2 - not sure.

They can't.